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| author | Bob Wilson <bob.wilson@apple.com> | 2010-12-15 22:14:12 +0000 |
|---|---|---|
| committer | Bob Wilson <bob.wilson@apple.com> | 2010-12-15 22:14:12 +0000 |
| commit | fa27a8621c4e890593a69b9033ac481cf8954075 (patch) | |
| tree | 7faefab0289ebb329c716a078d31b125552da196 /llvm/test | |
| parent | c3ff538dcf560e2cc03fe77de19ed41e8ada7232 (diff) | |
| download | bcm5719-llvm-fa27a8621c4e890593a69b9033ac481cf8954075.tar.gz bcm5719-llvm-fa27a8621c4e890593a69b9033ac481cf8954075.zip | |
Add Neon VCVT instructions for f32 <-> f16 conversions.
Clang is now providing intrinsics for these and so we need to support them
in the backend. Radar 8068427.
llvm-svn: 121902
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/ARM/vcvt.ll | 20 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/neon-convert-encoding.s | 6 | ||||
| -rw-r--r-- | llvm/test/MC/ARM/neont2-convert-encoding.s | 6 |
3 files changed, 29 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/vcvt.ll b/llvm/test/CodeGen/ARM/vcvt.ll index f4cc5368d9a..c078f493094 100644 --- a/llvm/test/CodeGen/ARM/vcvt.ll +++ b/llvm/test/CodeGen/ARM/vcvt.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s +; RUN: llc < %s -march=arm -mattr=+neon,+fp16 | FileCheck %s define <2 x i32> @vcvt_f32tos32(<2 x float>* %A) nounwind { ;CHECK: vcvt_f32tos32: @@ -138,3 +138,21 @@ declare <4 x i32> @llvm.arm.neon.vcvtfp2fxu.v4i32.v4f32(<4 x float>, i32) nounwi declare <4 x float> @llvm.arm.neon.vcvtfxs2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone declare <4 x float> @llvm.arm.neon.vcvtfxu2fp.v4f32.v4i32(<4 x i32>, i32) nounwind readnone +define <4 x float> @vcvt_f16tof32(<4 x i16>* %A) nounwind { +;CHECK: vcvt_f16tof32: +;CHECK: vcvt.f32.f16 + %tmp1 = load <4 x i16>* %A + %tmp2 = call <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16> %tmp1) + ret <4 x float> %tmp2 +} + +define <4 x i16> @vcvt_f32tof16(<4 x float>* %A) nounwind { +;CHECK: vcvt_f32tof16: +;CHECK: vcvt.f16.f32 + %tmp1 = load <4 x float>* %A + %tmp2 = call <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float> %tmp1) + ret <4 x i16> %tmp2 +} + +declare <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16>) nounwind readnone +declare <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float>) nounwind readnone diff --git a/llvm/test/MC/ARM/neon-convert-encoding.s b/llvm/test/MC/ARM/neon-convert-encoding.s index fdd1d033f32..1733c5222be 100644 --- a/llvm/test/MC/ARM/neon-convert-encoding.s +++ b/llvm/test/MC/ARM/neon-convert-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a9 -triple arm-unknown-unknown -show-encoding < %s | FileCheck %s @ CHECK: vcvt.s32.f32 d16, d16 @ encoding: [0x20,0x07,0xfb,0xf3] vcvt.s32.f32 d16, d16 @@ -32,3 +32,7 @@ vcvt.f32.s32 q8, q8, #1 @ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0x70,0x0e,0xff,0xf3] vcvt.f32.u32 q8, q8, #1 +@ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0x20,0x07,0xf6,0xf3] + vcvt.f32.f16 q8, d16 +@ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0x20,0x06,0xf6,0xf3] + vcvt.f16.f32 d16, q8 diff --git a/llvm/test/MC/ARM/neont2-convert-encoding.s b/llvm/test/MC/ARM/neont2-convert-encoding.s index 1dbd42a3946..1df3b43f305 100644 --- a/llvm/test/MC/ARM/neont2-convert-encoding.s +++ b/llvm/test/MC/ARM/neont2-convert-encoding.s @@ -1,4 +1,4 @@ -@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s +@ RUN: llvm-mc -mcpu=cortex-a9 -triple thumb-unknown-unknown -show-encoding < %s | FileCheck %s .code 16 @@ -34,3 +34,7 @@ vcvt.f32.s32 q8, q8, #1 @ CHECK: vcvt.f32.u32 q8, q8, #1 @ encoding: [0xff,0xff,0x70,0x0e] vcvt.f32.u32 q8, q8, #1 +@ CHECK: vcvt.f32.f16 q8, d16 @ encoding: [0xf6,0xff,0x20,0x07] + vcvt.f32.f16 q8, d16 +@ CHECK: vcvt.f16.f32 d16, q8 @ encoding: [0xf6,0xff,0x20,0x06] + vcvt.f16.f32 d16, q8 |
