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| author | Daniel Jasper <djasper@google.com> | 2016-12-09 09:04:51 +0000 |
|---|---|---|
| committer | Daniel Jasper <djasper@google.com> | 2016-12-09 09:04:51 +0000 |
| commit | f51e05ffbc28d184db78574f8477338093f358f8 (patch) | |
| tree | 89bc7c0f90b8df803fac335716326ffb94b3fa88 /llvm/test | |
| parent | 38b1b5d44f979a38b281fcb5efa24666bace5e6c (diff) | |
| download | bcm5719-llvm-f51e05ffbc28d184db78574f8477338093f358f8.tar.gz bcm5719-llvm-f51e05ffbc28d184db78574f8477338093f358f8.zip | |
Revert "[SelectionDAG] Add knownbits support for EXTRACT_VECTOR_ELT opcodes"
This reverts commit r288916 as it is currently causing a crasher in
Halide. Reproducer on llvm.org/PR31323. While it might be that halide is
generating invalid IR, llc shouldn't crash.
llvm-svn: 289194
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/known-bits-vector.ll | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/known-bits-vector.ll b/llvm/test/CodeGen/X86/known-bits-vector.ll index 717c7c63c38..944b3709b1a 100644 --- a/llvm/test/CodeGen/X86/known-bits-vector.ll +++ b/llvm/test/CodeGen/X86/known-bits-vector.ll @@ -58,7 +58,11 @@ define <4 x float> @knownbits_insert_uitofp(<4 x i32> %a0, i16 %a1, i16 %a2) nou ; X32-NEXT: vpinsrd $0, %eax, %xmm0, %xmm0 ; X32-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 ; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,2] -; X32-NEXT: vcvtdq2ps %xmm0, %xmm0 +; X32-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] +; X32-NEXT: vpsrld $16, %xmm0, %xmm0 +; X32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] +; X32-NEXT: vaddps {{\.LCPI.*}}, %xmm0, %xmm0 +; X32-NEXT: vaddps %xmm0, %xmm1, %xmm0 ; X32-NEXT: retl ; ; X64-LABEL: knownbits_insert_uitofp: @@ -68,7 +72,11 @@ define <4 x float> @knownbits_insert_uitofp(<4 x i32> %a0, i16 %a1, i16 %a2) nou ; X64-NEXT: vpinsrd $0, %eax, %xmm0, %xmm0 ; X64-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 ; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,0,2,2] -; X64-NEXT: vcvtdq2ps %xmm0, %xmm0 +; X64-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] +; X64-NEXT: vpsrld $16, %xmm0, %xmm0 +; X64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] +; X64-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0 +; X64-NEXT: vaddps %xmm0, %xmm1, %xmm0 ; X64-NEXT: retq %1 = zext i16 %a1 to i32 %2 = zext i16 %a2 to i32 |
