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| author | Sanjay Patel <spatel@rotateright.com> | 2016-06-02 16:01:15 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2016-06-02 16:01:15 +0000 |
| commit | f509d85a6dc13980000ca2eba13c34f7d62e4139 (patch) | |
| tree | 4f647ff9dbf9165e2e12c9deafd3c591c6714986 /llvm/test | |
| parent | 1c0eb972ed6fb27363c157b584b0e3dfc65e09fd (diff) | |
| download | bcm5719-llvm-f509d85a6dc13980000ca2eba13c34f7d62e4139.tar.gz bcm5719-llvm-f509d85a6dc13980000ca2eba13c34f7d62e4139.zip | |
[DAG] use getBitcast() to reduce code
Although this was intended to be NFC, the test case wiggle shows a change in
code scheduling/RA caused by a difference in the SDLoc() generation.
Depending on how you look at it, this is the (dis)advantage of exact checking
in regression tests.
llvm-svn: 271526
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_fneg.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/X86/vec_fneg.ll b/llvm/test/CodeGen/X86/vec_fneg.ll index 2dac7f25b40..78799ff04fe 100644 --- a/llvm/test/CodeGen/X86/vec_fneg.ll +++ b/llvm/test/CodeGen/X86/vec_fneg.ll @@ -74,9 +74,9 @@ define <2 x float> @fneg_bitcast(i64 %i) nounwind { ; X32-SSE2-NEXT: movl $-2147483648, %eax # imm = 0x80000000 ; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx ; X32-SSE2-NEXT: xorl %eax, %ecx +; X32-SSE2-NEXT: movd %ecx, %xmm1 ; X32-SSE2-NEXT: xorl {{[0-9]+}}(%esp), %eax -; X32-SSE2-NEXT: movd %eax, %xmm1 -; X32-SSE2-NEXT: movd %ecx, %xmm0 +; X32-SSE2-NEXT: movd %eax, %xmm0 ; X32-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; X32-SSE2-NEXT: retl ; |
