Revert "[ARM] Fix assembly and disassembly for VMRS/VMSR"

This reverts r310243. Only MVFR2 is actually restricted to v8 and it'll be a
little while before we can get a proper fix together. Better that we allow
incorrect code than reject correct in the meantime.

llvm-svn: 310384

6 files changed, 28 insertions, 363 deletions

diff --git a/llvm/test/MC/ARM/directive-arch_extension-fp.s b/llvm/test/MC/ARM/directive-arch_extension-fp.s
index c6855cda355..f2b4dc2c412 100644
--- a/llvm/test/MC/ARM/directive-arch_extension-fp.s
+++ b/llvm/test/MC/ARM/directive-arch_extension-fp.s
@@ -16,6 +16,8 @@
 
 	.type fp,%function
 fp:
+	vmrs r0, mvfr2
+@ CHECK-V7: error: instruction requires: FPARMv8
 
 	vselgt.f32 s0, s0, s0
 @ CHECK-V7: error: instruction requires: FPARMv8
@@ -150,6 +152,8 @@ fp:
 
 	.type nofp,%function
 nofp:
+	vmrs r0, mvfr2
+@ CHECK: error: instruction requires: FPARMv8
 
 	vselgt.f32 s0, s0, s0
 @ CHECK: error: instruction requires: FPARMv8
diff --git a/llvm/test/MC/ARM/simple-fp-encoding.s b/llvm/test/MC/ARM/simple-fp-encoding.s
index f45e32a842f..74babf9a699 100644
--- a/llvm/test/MC/ARM/simple-fp-encoding.s
+++ b/llvm/test/MC/ARM/simple-fp-encoding.s
@@ -132,10 +132,18 @@
         vmrs    APSR_nzcv, fpscr
         vmrs    apsr_nzcv, fpscr
         fmstat
+        vmrs    r2, fpsid
+        vmrs    r3, FPSID
+        vmrs    r4, mvfr0
+        vmrs    r5, MVFR1
 
 @ CHECK: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
 @ CHECK: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
 @ CHECK: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
+@ CHECK: vmrs r2, fpsid              @ encoding: [0x10,0x2a,0xf0,0xee]
+@ CHECK: vmrs r3, fpsid              @ encoding: [0x10,0x3a,0xf0,0xee]
+@ CHECK: vmrs r4, mvfr0              @ encoding: [0x10,0x4a,0xf7,0xee]
+@ CHECK: vmrs r5, mvfr1              @ encoding: [0x10,0x5a,0xf6,0xee]
 
 @ CHECK: vnegne.f64 d16, d16         @ encoding: [0x60,0x0b,0xf1,0x1e]
         vnegne.f64      d16, d16
@@ -157,6 +165,10 @@
 
 @ CHECK: vmrs r0, fpscr              @ encoding: [0x10,0x0a,0xf1,0xee]
         vmrs    r0, fpscr
+@ CHECK: vmrs  r0, fpexc             @ encoding: [0x10,0x0a,0xf8,0xee]
+        vmrs  r0, fpexc
+@ CHECK: vmrs  r0, fpsid             @ encoding: [0x10,0x0a,0xf0,0xee]
+        vmrs  r0, fpsid
 @ CHECK: vmrs	r1, fpinst           @ encoding: [0x10,0x1a,0xf9,0xee]
         vmrs r1, fpinst
 @ CHECK: vmrs	r8, fpinst2          @ encoding: [0x10,0x8a,0xfa,0xee]
@@ -164,6 +176,10 @@
 
 @ CHECK: vmsr fpscr, r0              @ encoding: [0x10,0x0a,0xe1,0xee]
         vmsr    fpscr, r0
+@ CHECK: vmsr  fpexc, r0             @ encoding: [0x10,0x0a,0xe8,0xee]
+        vmsr  fpexc, r0
+@ CHECK: vmsr  fpsid, r0             @ encoding: [0x10,0x0a,0xe0,0xee]
+        vmsr  fpsid, r0
 @ CHECK: vmsr	fpinst, r3           @ encoding: [0x10,0x3a,0xe9,0xee]
         vmsr fpinst, r3	
 @ CHECK: vmsr	fpinst2, r4          @ encoding: [0x10,0x4a,0xea,0xee]
diff --git a/llvm/test/MC/ARM/vmrs_vmsr.s b/llvm/test/MC/ARM/vmrs_vmsr.s
deleted file mode 100644
index c4e241998a6..00000000000
--- a/llvm/test/MC/ARM/vmrs_vmsr.s
+++ /dev/null
@@ -1,180 +0,0 @@
-// RUN: not llvm-mc -triple=armv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-// RUN: | FileCheck --check-prefix=CHECK-V7A-ARM %s
-// RUN:   FileCheck --check-prefix=ERROR-V7A-ARM < %t %s
-// RUN: not llvm-mc -triple=thumbv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-// RUN: | FileCheck --check-prefix=CHECK-V7A-THUMB %s
-// RUN:   FileCheck --check-prefix=ERROR-V7A-THUMB < %t %s
-// RUN: not llvm-mc -triple=thumbv7m-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-// RUN: | FileCheck --check-prefix=CHECK-V7M %s
-// RUN:   FileCheck --check-prefix=ERROR-V7M < %t %s
-// RUN: not llvm-mc -triple=armv8a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-// RUN: | FileCheck --check-prefix=CHECK-V8A-ARM %s
-// RUN:   FileCheck --check-prefix=ERROR-V8A-ARM < %t %s
-// RUN: not llvm-mc -triple=thumbv8a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-// RUN: | FileCheck --check-prefix=CHECK-V8A-THUMB %s
-// RUN:   FileCheck --check-prefix=ERROR-V8A-THUMB < %t %s
-// RUN: not llvm-mc -triple=thumbv8m.main-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-// RUN: | FileCheck --check-prefix=CHECK-V8M %s
-// RUN:   FileCheck --check-prefix=ERROR-V8M < %t %s
-// RUN: not llvm-mc -triple=thumbv7m-arm-none-eabi -show-encoding < %s 2>%t
-// RUN:   FileCheck --check-prefix=ERROR-NOVFP < %t %s
-
-        vmrs    APSR_nzcv, fpscr
-        vmrs    apsr_nzcv, fpscr
-        fmstat
-        vmrs    r10, fpscr
-        vmrs    r2, fpsid
-        vmrs    r3, FPSID
-        vmrs    r4, mvfr0
-        vmrs    r5, MVFR1
-        vmrs    r6, mvfr2
-        vmrs    sp, fpscr
-        vmrs    pc, fpscr
-
-// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-// CHECK-V7A-ARM: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-// CHECK-V7A-ARM: vmrs r10, fpscr             @ encoding: [0x10,0xaa,0xf1,0xee]
-// ERROR-V7A-ARM: instruction requires: armv8
-// ERROR-V7A-ARM: instruction requires: armv8
-// ERROR-V7A-ARM: instruction requires: armv8
-// ERROR-V7A-ARM: instruction requires: armv8
-// ERROR-V7A-ARM: instruction requires: armv8
-// CHECK-V7A-ARM: vmrs sp, fpscr              @ encoding: [0x10,0xda,0xf1,0xee]
-// ERROR-V7A-ARM: invalid operand for instruction
-
-// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V7A-THUMB: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V7A-THUMB: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-// ERROR-V7A-THUMB: instruction requires: armv8
-// ERROR-V7A-THUMB: instruction requires: armv8
-// ERROR-V7A-THUMB: instruction requires: armv8
-// ERROR-V7A-THUMB: instruction requires: armv8
-// ERROR-V7A-THUMB: instruction requires: armv8
-// ERROR-V7A-THUMB: invalid operand for instruction
-// ERROR-V7A-THUMB: invalid operand for instruction
-
-// CHECK-V7M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V7M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V7M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V7M: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-// ERROR-V7M: instruction requires: armv8
-// ERROR-V7M: instruction requires: armv8
-// ERROR-V7M: instruction requires: armv8
-// ERROR-V7M: instruction requires: armv8
-// ERROR-V7M: instruction requires: armv8
-// ERROR-V7M: invalid operand for instruction
-// ERROR-V7M: invalid operand for instruction
-
-// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-// CHECK-V8A-ARM: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-// CHECK-V8A-ARM: vmrs r10, fpscr             @ encoding: [0x10,0xaa,0xf1,0xee]
-// CHECK-V8A-ARM: vmrs r2, fpsid              @ encoding: [0x10,0x2a,0xf0,0xee]
-// CHECK-V8A-ARM: vmrs r3, fpsid              @ encoding: [0x10,0x3a,0xf0,0xee]
-// CHECK-V8A-ARM: vmrs r4, mvfr0              @ encoding: [0x10,0x4a,0xf7,0xee]
-// CHECK-V8A-ARM: vmrs r5, mvfr1              @ encoding: [0x10,0x5a,0xf6,0xee]
-// CHECK-V8A-ARM: vmrs r6, mvfr2              @ encoding: [0x10,0x6a,0xf5,0xee]
-// CHECK-V8A-ARM: vmrs sp, fpscr              @ encoding: [0x10,0xda,0xf1,0xee]
-// ERROR-V8A-ARM: invalid operand for instruction
-
-// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V8A-THUMB: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V8A-THUMB: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-// CHECK-V8A-THUMB: vmrs r2, fpsid              @ encoding: [0xf0,0xee,0x10,0x2a]
-// CHECK-V8A-THUMB: vmrs r3, fpsid              @ encoding: [0xf0,0xee,0x10,0x3a]
-// CHECK-V8A-THUMB: vmrs r4, mvfr0              @ encoding: [0xf7,0xee,0x10,0x4a]
-// CHECK-V8A-THUMB: vmrs r5, mvfr1              @ encoding: [0xf6,0xee,0x10,0x5a]
-// CHECK-V8A-THUMB: vmrs r6, mvfr2              @ encoding: [0xf5,0xee,0x10,0x6a]
-// CHECK-V8A-THUMB: vmrs sp, fpscr              @ encoding: [0xf1,0xee,0x10,0xda]
-// ERROR-V8A-THUMB: invalid operand for instruction
-
-// CHECK-V8M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V8M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V8M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-// CHECK-V8M: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-// ERROR-V8M: instruction requires: armv8
-// ERROR-V8M: instruction requires: armv8
-// ERROR-V8M: instruction requires: armv8
-// ERROR-V8M: instruction requires: armv8
-// ERROR-V8M: instruction requires: armv8
-// ERROR-V8M: invalid operand for instruction
-// ERROR-V8M: invalid operand for instruction
-
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: instruction requires: armv8
-// ERROR-NOVFP: instruction requires: armv8
-// ERROR-NOVFP: instruction requires: armv8
-// ERROR-NOVFP: instruction requires: armv8
-// ERROR-NOVFP: instruction requires: armv8
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: invalid operand for instruction
-
-        vmsr  fpscr, APSR_nzcv
-        vmsr  fpscr, r0
-        vmsr  fpexc, r1
-        vmsr  fpsid, r2
-        vmsr  fpscr, r10
-        vmsr  fpscr, sp
-        vmsr  fpscr, pc
-
-// ERROR-V7A-ARM: invalid operand for instruction
-// CHECK-V7A-ARM: vmsr  fpscr, r0             @ encoding: [0x10,0x0a,0xe1,0xee]
-// ERROR-V7A-ARM: instruction requires: armv8
-// ERROR-V7A-ARM: instruction requires: armv8
-// CHECK-V7A-ARM: vmsr  fpscr, r10            @ encoding: [0x10,0xaa,0xe1,0xee]
-// CHECK-V7A-ARM: vmsr  fpscr, sp             @ encoding: [0x10,0xda,0xe1,0xee]
-// ERROR-V7A-ARM: invalid operand for instruction
-
-// ERROR-V7A-THUMB: invalid operand for instruction
-// CHECK-V7A-THUMB: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-// ERROR-V7A-THUMB: instruction requires: armv8
-// ERROR-V7A-THUMB: instruction requires: armv8
-// CHECK-V7A-THUMB: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-// ERROR-V7A-THUMB: invalid operand for instruction
-// ERROR-V7A-THUMB: invalid operand for instruction
-
-// ERROR-V7M: invalid operand for instruction
-// CHECK-V7M: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-// ERROR-V7M: instruction requires: armv8
-// ERROR-V7M: instruction requires: armv8
-// CHECK-V7M: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-// ERROR-V7M: invalid operand for instruction
-// ERROR-V7M: invalid operand for instruction
-
-// ERROR-V8A-ARM: invalid operand for instruction
-// CHECK-V8A-ARM: vmsr  fpscr, r0             @ encoding: [0x10,0x0a,0xe1,0xee]
-// CHECK-V8A-ARM: vmsr  fpexc, r1             @ encoding: [0x10,0x1a,0xe8,0xee]
-// CHECK-V8A-ARM: vmsr  fpsid, r2             @ encoding: [0x10,0x2a,0xe0,0xee]
-// CHECK-V8A-ARM: vmsr  fpscr, r10            @ encoding: [0x10,0xaa,0xe1,0xee]
-// CHECK-V8A-ARM: vmsr  fpscr, sp             @ encoding: [0x10,0xda,0xe1,0xee]
-// ERROR-V8A-ARM: invalid operand for instruction
-
-// ERROR-V8A-THUMB: invalid operand for instruction
-// CHECK-V8A-THUMB: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-// CHECK-V8A-THUMB: vmsr  fpexc, r1             @ encoding: [0xe8,0xee,0x10,0x1a]
-// CHECK-V8A-THUMB: vmsr  fpsid, r2             @ encoding: [0xe0,0xee,0x10,0x2a]
-// CHECK-V8A-THUMB: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-// CHECK-V8A-THUMB: vmsr  fpscr, sp             @ encoding: [0xe1,0xee,0x10,0xda]
-// ERROR-V8A-THUMB: invalid operand for instruction
-
-// ERROR-V8M: invalid operand for instruction
-// CHECK-V8M: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-// ERROR-V8M: instruction requires: armv8
-// ERROR-V8M: instruction requires: armv8
-// CHECK-V8M: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-// ERROR-V8M: invalid operand for instruction
-// ERROR-V8M: invalid operand for instruction
-
-// ERROR-NOVFP: invalid operand for instruction
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: instruction requires: armv8
-// ERROR-NOVFP: instruction requires: armv8
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: instruction requires: VFP2
-// ERROR-NOVFP: invalid operand for instruction
diff --git a/llvm/test/MC/Disassembler/ARM/arm-vmrs_vmsr.txt b/llvm/test/MC/Disassembler/ARM/arm-vmrs_vmsr.txt
deleted file mode 100644
index f371d1df667..00000000000
--- a/llvm/test/MC/Disassembler/ARM/arm-vmrs_vmsr.txt
+++ /dev/null
@@ -1,60 +0,0 @@
-# RUN: not llvm-mc -disassemble -triple=armv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-# RUN: | FileCheck --check-prefix=CHECK-V7A %s
-# RUN:   FileCheck --check-prefix=ERROR-V7A < %t %s
-# RUN: llvm-mc -disassemble -triple=armv8a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-# RUN: | FileCheck --check-prefix=CHECK-V8A %s
-# RUN:   FileCheck --check-prefix=ERROR-V8A < %t %s
-
-       [0x10,0xfa,0xf1,0xee]
-       [0x10,0xfa,0xf1,0xee]
-       [0x10,0xfa,0xf1,0xee]
-       [0x10,0xaa,0xf1,0xee]
-       [0x10,0x2a,0xf0,0xee]
-       [0x10,0x3a,0xf0,0xee]
-       [0x10,0x4a,0xf7,0xee]
-       [0x10,0x5a,0xf6,0xee]
-       [0x10,0x6a,0xf5,0xee]
-       [0x10,0xda,0xf1,0xee]
-
-# CHECK-V7A: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-# CHECK-V7A: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-# CHECK-V7A: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-# CHECK-V7A: vmrs r10, fpscr             @ encoding: [0x10,0xaa,0xf1,0xee]
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# CHECK-V7A: vmrs sp, fpscr              @ encoding: [0x10,0xda,0xf1,0xee]
-
-# CHECK-V8A: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-# CHECK-V8A: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-# CHECK-V8A: vmrs APSR_nzcv, fpscr       @ encoding: [0x10,0xfa,0xf1,0xee]
-# CHECK-V8A: vmrs r10, fpscr             @ encoding: [0x10,0xaa,0xf1,0xee]
-# CHECK-V8A: vmrs r2, fpsid              @ encoding: [0x10,0x2a,0xf0,0xee]
-# CHECK-V8A: vmrs r3, fpsid              @ encoding: [0x10,0x3a,0xf0,0xee]
-# CHECK-V8A: vmrs r4, mvfr0              @ encoding: [0x10,0x4a,0xf7,0xee]
-# CHECK-V8A: vmrs r5, mvfr1              @ encoding: [0x10,0x5a,0xf6,0xee]
-# CHECK-V8A: vmrs r6, mvfr2              @ encoding: [0x10,0x6a,0xf5,0xee]
-# CHECK-V8A: vmrs sp, fpscr              @ encoding: [0x10,0xda,0xf1,0xee]
-
-       [0x10,0xfa,0xe1,0xee]
-       [0x10,0x0a,0xe1,0xee]
-       [0x10,0x1a,0xe8,0xee]
-       [0x10,0x2a,0xe0,0xee]
-       [0x10,0xaa,0xe1,0xee]
-       [0x10,0xda,0xe1,0xee]
-
-# ERROR-V7A: potentially undefined instruction encoding
-# CHECK-V7A: vmsr  fpscr, r0             @ encoding: [0x10,0x0a,0xe1,0xee]
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# CHECK-V7A: vmsr  fpscr, r10            @ encoding: [0x10,0xaa,0xe1,0xee]
-# CHECK-V7A: vmsr  fpscr, sp             @ encoding: [0x10,0xda,0xe1,0xee]
-
-# ERROR-V8A: potentially undefined instruction encoding
-# CHECK-V8A: vmsr  fpscr, r0             @ encoding: [0x10,0x0a,0xe1,0xee]
-# CHECK-V8A: vmsr  fpexc, r1             @ encoding: [0x10,0x1a,0xe8,0xee]
-# CHECK-V8A: vmsr  fpsid, r2             @ encoding: [0x10,0x2a,0xe0,0xee]
-# CHECK-V8A: vmsr  fpscr, r10            @ encoding: [0x10,0xaa,0xe1,0xee]
-# CHECK-V8A: vmsr  fpscr, sp             @ encoding: [0x10,0xda,0xe1,0xee]
diff --git a/llvm/test/MC/Disassembler/ARM/fp-encoding.txt b/llvm/test/MC/Disassembler/ARM/fp-encoding.txt
index ed52849f731..196bf44d4af 100644
--- a/llvm/test/MC/Disassembler/ARM/fp-encoding.txt
+++ b/llvm/test/MC/Disassembler/ARM/fp-encoding.txt
@@ -118,6 +118,10 @@
 
 0x10 0x0a 0xf1 0xee
 # CHECK: vmrs  r0, fpscr
+0x10 0x0a 0xf8 0xee
+# CHECK: vmrs  r0, fpexc
+0x10 0x0a 0xf0 0xee
+# CHECK: vmrs  r0, fpsid
 0x10 0x1a 0xf9 0xee
 # CHECK: vmrs  r1, fpinst
 0x10 0x8a 0xfa 0xee
@@ -125,6 +129,10 @@
 
 0x10 0x0a 0xe1 0xee
 # CHECK: vmsr  fpscr, r0
+0x10 0x0a 0xe8 0xee
+# CHECK: vmsr  fpexc, r0
+0x10 0x0a 0xe0 0xee
+# CHECK: vmsr  fpsid, r0
 0x10 0x3a 0xe9 0xee
 # CHECK: vmsr  fpinst, r3
 0x10 0x4a 0xea 0xee
diff --git a/llvm/test/MC/Disassembler/ARM/thumb-vmrs_vmsr.txt b/llvm/test/MC/Disassembler/ARM/thumb-vmrs_vmsr.txt
deleted file mode 100644
index 75d9a0f8d96..00000000000
--- a/llvm/test/MC/Disassembler/ARM/thumb-vmrs_vmsr.txt
+++ /dev/null
@@ -1,123 +0,0 @@
-# RUN: not llvm-mc -disassemble -triple=thumbv7a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-# RUN: | FileCheck --check-prefix=CHECK-V7A %s
-# RUN:   FileCheck --check-prefix=ERROR-V7A < %t %s
-# RUN: not llvm-mc -disassemble -triple=thumbv7m-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-# RUN: | FileCheck --check-prefix=CHECK-V7M %s
-# RUN:   FileCheck --check-prefix=ERROR-V7M < %t %s
-# RUN: llvm-mc -disassemble -triple=thumbv8a-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-# RUN: | FileCheck --check-prefix=CHECK-V8A %s
-# RUN:   FileCheck --check-prefix=ERROR-V8A < %t %s
-# RUN: not llvm-mc -disassemble -triple=thumbv8m.main-arm-none-eabi -mattr=+vfp2 -show-encoding < %s 2>%t \
-# RUN: | FileCheck --check-prefix=CHECK-V8M %s
-# RUN:   FileCheck --check-prefix=ERROR-V8M < %t %s
-# RUN: not llvm-mc -disassemble -triple=thumbv7m-arm-none-eabi -show-encoding < %s 2>%t
-# RUN:   FileCheck --check-prefix=ERROR-NOVFP < %t %s
-
-       [0xf1,0xee,0x10,0xfa]
-       [0xf1,0xee,0x10,0xfa]
-       [0xf1,0xee,0x10,0xfa]
-       [0xf1,0xee,0x10,0xaa]
-       [0xf0,0xee,0x10,0x2a]
-       [0xf0,0xee,0x10,0x3a]
-       [0xf7,0xee,0x10,0x4a]
-       [0xf6,0xee,0x10,0x5a]
-       [0xf5,0xee,0x10,0x6a]
-       [0xf1,0xee,0x10,0xda]
-
-# CHECK-V7A: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V7A: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V7A: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V7A: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: potentially undefined instruction encoding
-
-# CHECK-V7M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V7M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V7M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V7M: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-# ERROR-V7M: invalid instruction encoding
-# ERROR-V7M: invalid instruction encoding
-# ERROR-V7M: invalid instruction encoding
-# ERROR-V7M: invalid instruction encoding
-# ERROR-V7M: invalid instruction encoding
-# ERROR-V7M: potentially undefined instruction encoding
-
-# CHECK-V8A: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V8A: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V8A: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V8A: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-# CHECK-V8A: vmrs r2, fpsid              @ encoding: [0xf0,0xee,0x10,0x2a]
-# CHECK-V8A: vmrs r3, fpsid              @ encoding: [0xf0,0xee,0x10,0x3a]
-# CHECK-V8A: vmrs r4, mvfr0              @ encoding: [0xf7,0xee,0x10,0x4a]
-# CHECK-V8A: vmrs r5, mvfr1              @ encoding: [0xf6,0xee,0x10,0x5a]
-# CHECK-V8A: vmrs r6, mvfr2              @ encoding: [0xf5,0xee,0x10,0x6a]
-# CHECK-V8A: vmrs sp, fpscr              @ encoding: [0xf1,0xee,0x10,0xda]
-
-# CHECK-V8M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V8M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V8M: vmrs APSR_nzcv, fpscr       @ encoding: [0xf1,0xee,0x10,0xfa]
-# CHECK-V8M: vmrs r10, fpscr             @ encoding: [0xf1,0xee,0x10,0xaa]
-# ERROR-V8M: invalid instruction encoding
-# ERROR-V8M: invalid instruction encoding
-# ERROR-V8M: invalid instruction encoding
-# ERROR-V8M: invalid instruction encoding
-# ERROR-V8M: invalid instruction encoding
-# ERROR-V8M: potentially undefined instruction encoding
-
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-
-[0xe1,0xee,0x10,0xfa]
-[0xe1,0xee,0x10,0x0a]
-[0xe8,0xee,0x10,0x1a]
-[0xe0,0xee,0x10,0x2a]
-[0xe1,0xee,0x10,0xaa]
-[0xe1,0xee,0x10,0xda]
-
-# ERROR-V7A: potentially undefined instruction encoding
-# CHECK-V7A: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-# ERROR-V7A: invalid instruction encoding
-# ERROR-V7A: invalid instruction encoding
-# CHECK-V7A: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-# ERROR-V7A: potentially undefined instruction encoding
-
-# ERROR-V7M: potentially undefined instruction encoding
-# CHECK-V7M: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-# ERROR-V7M: invalid instruction encoding
-# ERROR-V7M: invalid instruction encoding
-# CHECK-V7M: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-# ERROR-V7M: potentially undefined instruction encoding
-
-# ERROR-V8A: potentially undefined instruction encoding
-# CHECK-V8A: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-# CHECK-V8A: vmsr  fpexc, r1             @ encoding: [0xe8,0xee,0x10,0x1a]
-# CHECK-V8A: vmsr  fpsid, r2             @ encoding: [0xe0,0xee,0x10,0x2a]
-# CHECK-V8A: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-# CHECK-V8A: vmsr  fpscr, sp             @ encoding: [0xe1,0xee,0x10,0xda]
-
-# ERROR-V8M: potentially undefined instruction encoding
-# CHECK-V8M: vmsr  fpscr, r0             @ encoding: [0xe1,0xee,0x10,0x0a]
-# ERROR-V8M: invalid instruction encoding
-# ERROR-V8M: invalid instruction encoding
-# CHECK-V8M: vmsr  fpscr, r10            @ encoding: [0xe1,0xee,0x10,0xaa]
-# ERROR-V8M: potentially undefined instruction encoding
-
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-# ERROR-NOVFP: invalid instruction encoding
-