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author | Zvi Rackover <zvi.rackover@intel.com> | 2016-11-15 13:29:23 +0000 |
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committer | Zvi Rackover <zvi.rackover@intel.com> | 2016-11-15 13:29:23 +0000 |
commit | f0b9b57bd3fc48adaf344c3116522d06e1625f07 (patch) | |
tree | 340afb56a9901cff77e7b3be72eb66e662fbaa4f /llvm/test | |
parent | 4b4dc172e7c8bd871ff1f2a90789612a6e83585f (diff) | |
download | bcm5719-llvm-f0b9b57bd3fc48adaf344c3116522d06e1625f07.tar.gz bcm5719-llvm-f0b9b57bd3fc48adaf344c3116522d06e1625f07.zip |
[X86][FastISel] Fix lowering of overflow result on AVX512 targets
Summary:
Fix a case where the overflow value of type i1, which is legal on AVX512, was assigned to a VK1 register class.
We always want this value to be assigned to a GPR since the overflow return value is lowered to a SETO instruction.
Fixes pr30981.
Reviewers: mkuper, igorb, craig.topper, guyblank, qcolombet
Subscribers: qcolombet, llvm-commits
Differential Revision: https://reviews.llvm.org/D26620
llvm-svn: 286958
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll b/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll index d88b54a7edb..4f8df0533aa 100644 --- a/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll +++ b/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll @@ -10,14 +10,14 @@ declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind define fastcc i32 @test() nounwind { entry: -; CHECK-LABEL: _test: -; CHECK: ## BB#0: -; CHECK-NEXT: movl $1, %eax -; CHECK-NEXT: addl $0, %eax -; CHECK-NEXT: seto %k0 -; CHECK-NEXT: movl %eax, -4(%rsp) ## 4-byte Spill -; CHECK-NEXT: kmovw %k0, -6(%rsp) ## 2-byte Spill -; CHECK-NEXT: jo LBB0_2 +; CHECK-LABEL: test: +; CHECK: ## BB#0: +; CHECK-NEXT: movl $1, %eax +; CHECK-NEXT: addl $0, %eax +; CHECK-NEXT: seto %cl +; CHECK-NEXT: movl %eax, -{{[0-9]+}}(%rsp) ## 4-byte Spill +; CHECK-NEXT: movb %cl, -{{[0-9]+}}(%rsp) ## 1-byte Spill +; CHECK-NEXT: jo LBB0_2 %tmp1 = call %0 @llvm.sadd.with.overflow.i32(i32 1, i32 0) %tmp2 = extractvalue %0 %tmp1, 1 br i1 %tmp2, label %.backedge, label %BB3 |