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| author | Lei Huang <lei@ca.ibm.com> | 2018-03-19 19:22:52 +0000 |
|---|---|---|
| committer | Lei Huang <lei@ca.ibm.com> | 2018-03-19 19:22:52 +0000 |
| commit | ecfede94a7a55b4907bcf87c23366f8e2625899e (patch) | |
| tree | 76dc4144ddf4c060fb81349085cfeed5a6e274cf /llvm/test | |
| parent | 1038cff6e972acad7b693766019925f5481ab69b (diff) | |
| download | bcm5719-llvm-ecfede94a7a55b4907bcf87c23366f8e2625899e.tar.gz bcm5719-llvm-ecfede94a7a55b4907bcf87c23366f8e2625899e.zip | |
[Power9]Legalize and emit code for quad-precision copySign/abs/nabs/neg/sqrt
Legalize and emit code for quad-precision floating point operations:
* xscpsgnqp
* xsabsqp
* xsnabsqp
* xsnegqp
* xssqrtqp
Differential Revision: https://reviews.llvm.org/D44530
llvm-svn: 327889
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/f128-arith.ll | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/f128-arith.ll b/llvm/test/CodeGen/PowerPC/f128-arith.ll index 540754d2f7b..55166e50e5e 100644 --- a/llvm/test/CodeGen/PowerPC/f128-arith.ll +++ b/llvm/test/CodeGen/PowerPC/f128-arith.ll @@ -71,3 +71,79 @@ entry: ; CHECK stxvx ; CHECK-NEXT blr } + +define void @qpSqrt(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %1 = tail call fp128 @llvm.sqrt.f128(fp128 %0) + store fp128 %1, fp128* %res, align 16 + ret void + +; CHECK-LABEL: qpSqrt +; CHECK-NOT bl sqrtl +; CHECK xssqrtqp +; CHECK stxv +; CHECK blr +} +declare fp128 @llvm.sqrt.f128(fp128 %Val) + +define void @qpCpsgn(fp128* nocapture readonly %a, fp128* nocapture readonly %b, + fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %1 = load fp128, fp128* %b, align 16 + %2 = tail call fp128 @llvm.copysign.f128(fp128 %0, fp128 %1) + store fp128 %2, fp128* %res, align 16 + ret void + +; CHECK-LABEL: qpSqrt +; CHECK-NOT rldimi +; CHECK xscpsgnqp +; CHECK stxv +; CHECK blr +} +declare fp128 @llvm.copysign.f128(fp128 %Mag, fp128 %Sgn) + +define void @qpAbs(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %1 = tail call fp128 @llvm.fabs.f128(fp128 %0) + store fp128 %1, fp128* %res, align 16 + ret void + +; CHECK-LABEL: qpAbs +; CHECK-NOT clrldi +; CHECK xsabsqp +; CHECK stxv +; CHECK blr +} +declare fp128 @llvm.fabs.f128(fp128 %Val) + +define void @qpNAbs(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %1 = tail call fp128 @llvm.fabs.f128(fp128 %0) + %neg = fsub fp128 0xL00000000000000008000000000000000, %1 + store fp128 %neg, fp128* %res, align 16 + ret void + +; CHECK-LABEL: qpNAbs +; CHECK-NOT bl __subtf3 +; CHECK xsnabsqp +; CHECK stxv +; CHECK blr +} + +define void @qpNeg(fp128* nocapture readonly %a, fp128* nocapture %res) { +entry: + %0 = load fp128, fp128* %a, align 16 + %sub = fsub fp128 0xL00000000000000008000000000000000, %0 + store fp128 %sub, fp128* %res, align 16 + ret void + +; CHECK-LABEL: qpNeg +; CHECK-NOT bl __subtf3 +; CHECK xsnegqp +; CHECK stxv +; CHECK blr +} |

