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authorCraig Topper <craig.topper@intel.com>2017-10-22 06:18:26 +0000
committerCraig Topper <craig.topper@intel.com>2017-10-22 06:18:26 +0000
commite975127db642fb2742121c10549ac7ed53698137 (patch)
treefb5a34c18e74743ef2c17e39f275c2767d6e8731 /llvm/test
parenta33846aca6999d11a33cab2b2455f671b3a10ff1 (diff)
downloadbcm5719-llvm-e975127db642fb2742121c10549ac7ed53698137.tar.gz
bcm5719-llvm-e975127db642fb2742121c10549ac7ed53698137.zip
[X86] Teach the disassembler that some instructions use VEX.W==0 without a corresponding VEX.W==1 instruction and we shouldn't treat them as if VEX.W is ignored.
Fixes PR11304. llvm-svn: 316285
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Disassembler/X86/x86-64-err.txt11
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/X86/x86-64-err.txt b/llvm/test/MC/Disassembler/X86/x86-64-err.txt
index 8dd43ed485c..9674ea0528e 100644
--- a/llvm/test/MC/Disassembler/X86/x86-64-err.txt
+++ b/llvm/test/MC/Disassembler/X86/x86-64-err.txt
@@ -4,3 +4,14 @@
# 64: warning: invalid instruction encoding
# 32: into
0xce
+
+# 64: invalid instruction encoding
+0xc4,0x62,0xf9,0x18,0x20
+# 64: invalid instruction encoding
+0xc4,0x62,0xfd,0x18,0x20
+# 64: invalid instruction encoding
+0xc4,0xc2,0xfd,0x19,0xcc
+# 64: invalid instruction encoding
+0xc4,0xe2,0xfd,0x1a,0x08
+# 64: invalid instruction encoding
+0xc4,0xe3,0xfd,0x39,0xc5,0x01
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