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authorJames Molloy <james.molloy@arm.com>2015-11-04 16:55:07 +0000
committerJames Molloy <james.molloy@arm.com>2015-11-04 16:55:07 +0000
commite7d679cf4c69e9b225ee7830868c67fa3d623fc4 (patch)
tree4b5fbcec410ef6e587c564605c00156aa3e9a9f5 /llvm/test
parentd6e069f990607499aff09aca54b238a86a25552b (diff)
downloadbcm5719-llvm-e7d679cf4c69e9b225ee7830868c67fa3d623fc4.tar.gz
bcm5719-llvm-e7d679cf4c69e9b225ee7830868c67fa3d623fc4.zip
[ARM] Combine CMOV into BFI where possible
If we have a CMOV, OR and AND combination such as: if (x & CN) y |= CM; And: * CN is a single bit; * All bits covered by CM are known zero in y; Then we can convert this to a sequence of BFI instructions. This will always be a win if CM is a single bit, will always be no worse than the TST & OR sequence if CM is two bits, and for thumb will be no worse if CM is three bits (due to the extra IT instruction). llvm-svn: 252057
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/ARM/bfi.ll23
1 files changed, 23 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/bfi.ll b/llvm/test/CodeGen/ARM/bfi.ll
index 0661960d1ae..46653c3e7be 100644
--- a/llvm/test/CodeGen/ARM/bfi.ll
+++ b/llvm/test/CodeGen/ARM/bfi.ll
@@ -74,3 +74,26 @@ entry:
%or = or i32 %shl, %and
ret i32 %or
}
+
+define i32 @f7(i32 %x, i32 %y) {
+; CHECK-LABEL: f7:
+; CHECK: bfi r1, r0, #4, #1
+ %y2 = and i32 %y, 4294967040 ; 0xFFFFFF00
+ %and = and i32 %x, 4
+ %or = or i32 %y2, 16
+ %cmp = icmp ne i32 %and, 0
+ %sel = select i1 %cmp, i32 %or, i32 %y2
+ ret i32 %sel
+}
+
+define i32 @f8(i32 %x, i32 %y) {
+; CHECK-LABEL: f8:
+; CHECK: bfi r1, r0, #4, #1
+; CHECK: bfi r1, r0, #5, #1
+ %y2 = and i32 %y, 4294967040 ; 0xFFFFFF00
+ %and = and i32 %x, 4
+ %or = or i32 %y2, 48
+ %cmp = icmp ne i32 %and, 0
+ %sel = select i1 %cmp, i32 %or, i32 %y2
+ ret i32 %sel
+}
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