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author | Quentin Colombet <quentin.colombet@gmail.com> | 2019-03-14 01:37:13 +0000 |
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committer | Quentin Colombet <quentin.colombet@gmail.com> | 2019-03-14 01:37:13 +0000 |
commit | e77e5f44b871faa775b2cfa289b35f900f9443ab (patch) | |
tree | 42c308960e044b69f92972ce4d5f29036b04b6e9 /llvm/test | |
parent | 591040adc2666006b7242520f8b55e8960b07d71 (diff) | |
download | bcm5719-llvm-e77e5f44b871faa775b2cfa289b35f900f9443ab.tar.gz bcm5719-llvm-e77e5f44b871faa775b2cfa289b35f900f9443ab.zip |
[GlobalISel][Utils] Add a getConstantVRegVal variant that looks through instrs
getConstantVRegVal used to only look for G_CONSTANT when looking at
unboxing the value of a vreg. However, constants are sometimes not
directly used and are hidden behind trunc, s|zext or copy chain of
computation.
In particular this may be introduced by the legalization process that
doesn't want to simplify these patterns because it can lead to infine
loop when legalizing a constant.
To circumvent that problem, add a new variant of getConstantVRegVal,
named getConstantVRegValWithLookThrough, that allow to look through
extensions.
Differential Revision: https://reviews.llvm.org/D59227
llvm-svn: 356116
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll | 12 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll | 9 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll | 9 | ||||
-rw-r--r-- | llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll | 14 |
4 files changed, 16 insertions, 28 deletions
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll index f15977cf6b7..2753fe157a5 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll +++ b/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll @@ -64,14 +64,12 @@ entry: define i32 @select_with_negation(i32 %a, i32 %b, i32 %x, i32 %y) { ; MIPS32-LABEL: select_with_negation: ; MIPS32: # %bb.0: # %entry -; MIPS32-NEXT: lui $1, 65535 -; MIPS32-NEXT: ori $1, $1, 65535 ; MIPS32-NEXT: slt $4, $4, $5 -; MIPS32-NEXT: xor $1, $4, $1 -; MIPS32-NEXT: lui $4, 0 -; MIPS32-NEXT: ori $4, $4, 1 -; MIPS32-NEXT: and $1, $1, $4 -; MIPS32-NEXT: movn $7, $6, $1 +; MIPS32-NEXT: not $4, $4 +; MIPS32-NEXT: lui $5, 0 +; MIPS32-NEXT: ori $5, $5, 1 +; MIPS32-NEXT: and $4, $4, $5 +; MIPS32-NEXT: movn $7, $6, $4 ; MIPS32-NEXT: move $2, $7 ; MIPS32-NEXT: jr $ra ; MIPS32-NEXT: nop diff --git a/llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll index a8496bf02cf..9db8b8e3479 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll +++ b/llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll @@ -28,8 +28,7 @@ define i64 @test_ashr_i64_imm1(i64 %arg1) { ; X64-LABEL: test_ashr_i64_imm1: ; X64: # %bb.0: ; X64-NEXT: movq %rdi, %rax -; X64-NEXT: movq $1, %rcx -; X64-NEXT: sarq %cl, %rax +; X64-NEXT: sarq %rax ; X64-NEXT: retq %res = ashr i64 %arg1, 1 ret i64 %res @@ -62,8 +61,7 @@ define i32 @test_ashr_i32_imm1(i32 %arg1) { ; X64-LABEL: test_ashr_i32_imm1: ; X64: # %bb.0: ; X64-NEXT: movl %edi, %eax -; X64-NEXT: movl $1, %ecx -; X64-NEXT: sarl %cl, %eax +; X64-NEXT: sarl %eax ; X64-NEXT: retq %res = ashr i32 %arg1, 1 ret i32 %res @@ -101,8 +99,7 @@ define i16 @test_ashr_i16_imm1(i32 %arg1) { ; X64-LABEL: test_ashr_i16_imm1: ; X64: # %bb.0: ; X64-NEXT: movl %edi, %eax -; X64-NEXT: movw $1, %cx -; X64-NEXT: sarw %cl, %ax +; X64-NEXT: sarw %ax ; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: retq %a = trunc i32 %arg1 to i16 diff --git a/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll index 9df4c1a4e80..ef51cb8cbff 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll +++ b/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll @@ -28,8 +28,7 @@ define i64 @test_lshr_i64_imm1(i64 %arg1) { ; X64-LABEL: test_lshr_i64_imm1: ; X64: # %bb.0: ; X64-NEXT: movq %rdi, %rax -; X64-NEXT: movq $1, %rcx -; X64-NEXT: shrq %cl, %rax +; X64-NEXT: shrq %rax ; X64-NEXT: retq %res = lshr i64 %arg1, 1 ret i64 %res @@ -62,8 +61,7 @@ define i32 @test_lshr_i32_imm1(i32 %arg1) { ; X64-LABEL: test_lshr_i32_imm1: ; X64: # %bb.0: ; X64-NEXT: movl %edi, %eax -; X64-NEXT: movl $1, %ecx -; X64-NEXT: shrl %cl, %eax +; X64-NEXT: shrl %eax ; X64-NEXT: retq %res = lshr i32 %arg1, 1 ret i32 %res @@ -101,8 +99,7 @@ define i16 @test_lshr_i16_imm1(i32 %arg1) { ; X64-LABEL: test_lshr_i16_imm1: ; X64: # %bb.0: ; X64-NEXT: movl %edi, %eax -; X64-NEXT: movw $1, %cx -; X64-NEXT: shrw %cl, %ax +; X64-NEXT: shrw %ax ; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: retq %a = trunc i32 %arg1 to i16 diff --git a/llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll index e6625c9226e..e7e134ba2cc 100644 --- a/llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll +++ b/llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll @@ -27,9 +27,7 @@ define i64 @test_shl_i64_imm(i64 %arg1) { define i64 @test_shl_i64_imm1(i64 %arg1) { ; X64-LABEL: test_shl_i64_imm1: ; X64: # %bb.0: -; X64-NEXT: movq %rdi, %rax -; X64-NEXT: movq $1, %rcx -; X64-NEXT: shlq %cl, %rax +; X64-NEXT: leaq (%rdi,%rdi), %rax ; X64-NEXT: retq %res = shl i64 %arg1, 1 ret i64 %res @@ -61,9 +59,8 @@ define i32 @test_shl_i32_imm(i32 %arg1) { define i32 @test_shl_i32_imm1(i32 %arg1) { ; X64-LABEL: test_shl_i32_imm1: ; X64: # %bb.0: -; X64-NEXT: movl %edi, %eax -; X64-NEXT: movl $1, %ecx -; X64-NEXT: shll %cl, %eax +; X64-NEXT: # kill: def $edi killed $edi def $rdi +; X64-NEXT: leal (%rdi,%rdi), %eax ; X64-NEXT: retq %res = shl i32 %arg1, 1 ret i32 %res @@ -100,9 +97,8 @@ define i16 @test_shl_i16_imm(i32 %arg1) { define i16 @test_shl_i16_imm1(i32 %arg1) { ; X64-LABEL: test_shl_i16_imm1: ; X64: # %bb.0: -; X64-NEXT: movl %edi, %eax -; X64-NEXT: movw $1, %cx -; X64-NEXT: shlw %cl, %ax +; X64-NEXT: # kill: def $edi killed $edi def $rdi +; X64-NEXT: leal (%rdi,%rdi), %eax ; X64-NEXT: # kill: def $ax killed $ax killed $eax ; X64-NEXT: retq %a = trunc i32 %arg1 to i16 |