diff options
| author | Jack Carter <jcarter@mips.com> | 2013-01-16 00:07:45 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2013-01-16 00:07:45 +0000 |
| commit | e0c1e1a47e001a2f858df260aef33c8942837fec (patch) | |
| tree | aaf57b91de7c12f1457b960da29d185f8537a524 /llvm/test | |
| parent | 962c9089d99823b5fecef21f497001cde6f60de1 (diff) | |
| download | bcm5719-llvm-e0c1e1a47e001a2f858df260aef33c8942837fec.tar.gz bcm5719-llvm-e0c1e1a47e001a2f858df260aef33c8942837fec.zip | |
Akira,
Hope you are feeling better.
The Mips RDHWR (Read Hardware Register) instruction was not
tested for assembler or dissassembler consumption. This patch
adds that functionality.
Contributer: Vladimir Medic
llvm-svn: 172579
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/mips32.txt | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Disassembler/Mips/mips32_le.txt | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips-alu-instructions.s | 5 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips64-alu-instructions.s | 6 |
4 files changed, 23 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/mips32.txt b/llvm/test/MC/Disassembler/Mips/mips32.txt index a1933190b14..70224860bc7 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32.txt @@ -404,3 +404,9 @@ # CHECK: xori $9, $6, 17767 0x38 0xc9 0x45 0x67 + +# CHECK: .set push +# CHECK: .set mips32r2 +# CHECK: rdhwr $5, $29 +# CHECK: .set pop +0x7c 0x05 0xe8 0x3b diff --git a/llvm/test/MC/Disassembler/Mips/mips32_le.txt b/llvm/test/MC/Disassembler/Mips/mips32_le.txt index 08b36726baf..48fa8e2c7fa 100644 --- a/llvm/test/MC/Disassembler/Mips/mips32_le.txt +++ b/llvm/test/MC/Disassembler/Mips/mips32_le.txt @@ -404,3 +404,9 @@ # CHECK: xori $9, $6, 17767 0x67 0x45 0xc9 0x38 + +# CHECK: .set push +# CHECK: .set mips32r2 +# CHECK: rdhwr $5, $29 +# CHECK: .set pop +0x3b 0xe8 0x05 0x7c diff --git a/llvm/test/MC/Mips/mips-alu-instructions.s b/llvm/test/MC/Mips/mips-alu-instructions.s index ee2a9a0db45..52fd900091d 100644 --- a/llvm/test/MC/Mips/mips-alu-instructions.s +++ b/llvm/test/MC/Mips/mips-alu-instructions.s @@ -81,6 +81,10 @@ # CHECK: sub $6, $zero, $7 # encoding: [0x22,0x30,0x07,0x00] # CHECK: subu $6, $zero, $7 # encoding: [0x23,0x30,0x07,0x00] # CHECK: addu $7, $8, $zero # encoding: [0x21,0x38,0x00,0x01] +# CHECK: .set push +# CHECK: .set mips32r2 +# CHECK: rdhwr $5, $29 +# CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c] add $9,$6,$7 add $9,$6,17767 addu $9,$6,-15001 @@ -98,3 +102,4 @@ neg $6,$7 negu $6,$7 move $7,$8 + rdhwr $5, $29 diff --git a/llvm/test/MC/Mips/mips64-alu-instructions.s b/llvm/test/MC/Mips/mips64-alu-instructions.s index a77ed43ff10..d30ddeee717 100644 --- a/llvm/test/MC/Mips/mips64-alu-instructions.s +++ b/llvm/test/MC/Mips/mips64-alu-instructions.s @@ -78,6 +78,11 @@ # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00] # CHECK: dsubu $4, $3, $5 # encoding: [0x2f,0x20,0x65,0x00] # CHECK: daddu $7, $8, $zero # encoding: [0x2d,0x38,0x00,0x01] +# CHECK: .set push +# CHECK: .set mips32r2 +# CHECK: rdhwr $5, $29 +# CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c] + dadd $9,$6,$7 dadd $9,$6,17767 daddu $9,$6,-15001 @@ -92,3 +97,4 @@ multu $3,$5 dsubu $4,$3,$5 move $7,$8 + rdhwr $5, $29 |
