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| author | Craig Topper <craig.topper@intel.com> | 2018-01-25 04:45:30 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-25 04:45:30 +0000 |
| commit | dbddac0915d23053a46002dd3952c3576310f543 (patch) | |
| tree | 8557fcad18957c6837debf0bd97e6fd2500e455c /llvm/test | |
| parent | 81c87092d1a53e384020d6d83ea611b0076d3e39 (diff) | |
| download | bcm5719-llvm-dbddac0915d23053a46002dd3952c3576310f543.tar.gz bcm5719-llvm-dbddac0915d23053a46002dd3952c3576310f543.zip | |
[X86] Remove 64/128/256 from MMX/SSE/AVX instruction names for overall consistency. NFC
MMX instrutions all start with MMX_ so the 64 isn't needed for disambigutation.
SSE/AVX1 instructions are assumed 128-bit so we don't need to say 128.
AVX2 instructions should use a Y to indicate 256-bits.
llvm-svn: 323402
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/X86/x86_64-asm-match.s | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/MC/X86/x86_64-asm-match.s b/llvm/test/MC/X86/x86_64-asm-match.s index fb7f7dadf91..a0ef1c11aae 100644 --- a/llvm/test/MC/X86/x86_64-asm-match.s +++ b/llvm/test/MC/X86/x86_64-asm-match.s @@ -2,7 +2,7 @@ // REQUIRES: asserts // CHECK: AsmMatcher: found 4 encodings with mnemonic 'pshufb' -// CHECK: Trying to match opcode MMX_PSHUFBrr64 +// CHECK: Trying to match opcode MMX_PSHUFBrr // CHECK: Matching formal operand class MCK_VR64 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): Opcode result: multiple operand mismatches, ignoring this opcode // CHECK: Trying to match opcode PSHUFBrr // CHECK: Matching formal operand class MCK_FR32 against actual operand at index 1 (Memory: ModeSize=64,BaseReg=rip,Scale=1,Disp=CPI1_0): Opcode result: multiple operand mismatches, ignoring this opcode |
