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| author | Craig Topper <craig.topper@gmail.com> | 2017-01-29 22:53:33 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2017-01-29 22:53:33 +0000 |
| commit | db919caf1b29c509e0ae594ee5b9dc5dba453298 (patch) | |
| tree | 9d035b0aab50596acca615b2fbb3a537b77e1dd2 /llvm/test | |
| parent | 603b38dca15e623e0b0a3cb4c3f2c91a100fba78 (diff) | |
| download | bcm5719-llvm-db919caf1b29c509e0ae594ee5b9dc5dba453298.tar.gz bcm5719-llvm-db919caf1b29c509e0ae594ee5b9dc5dba453298.zip | |
[AVX-512] Fix lowering for mask register concatenation with undef in the lower half.
Previously this test case fired an assertion in getNode because we tried to create an insert_subvector with both input types the same size and the index pointing to half the vector width.
llvm-svn: 293446
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll b/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll index 2200f115988..3a93b544b95 100644 --- a/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll +++ b/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll @@ -167,3 +167,15 @@ define <2 x i1> @test10(<4 x i1> %a, <4 x i1> %b) { %res = shufflevector <4 x i1> %a, <4 x i1> %b, <2 x i32> <i32 2, i32 3> ret <2 x i1> %res } + +define <8 x i1> @test11(<4 x i1> %a, <4 x i1>%b) { +; CHECK-LABEL: test11: +; CHECK: # BB#0: +; CHECK-NEXT: vpslld $31, %xmm0, %xmm0 +; CHECK-NEXT: vptestmd %xmm0, %xmm0, %k0 +; CHECK-NEXT: kshiftlb $4, %k0, %k0 +; CHECK-NEXT: vpmovm2w %k0, %xmm0 +; CHECK-NEXT: retq + %res = shufflevector <4 x i1> %a, <4 x i1> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3> + ret <8 x i1> %res +} |
