ARM IAS: add support for .unwind_raw directive

This implements the unwind_raw directive for the ARM IAS.  The unwind_raw
directive takes the form of a stack offset value followed by one or more bytes
representing the opcodes to be emitted.  The opcode emitted will interpreted as
if it were assembled by the opcode assembler via the standard unwinding
directives.

Thanks to Logan Chien for an extra test!

llvm-svn: 199707

2 files changed, 186 insertions, 0 deletions

diff --git a/llvm/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s b/llvm/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s
new file mode 100644
index 00000000000..72a208ed83d
--- /dev/null
+++ b/llvm/test/MC/ARM/eh-directive-unwind_raw-diagnostics.s
@@ -0,0 +1,73 @@
+@ RUN: not llvm-mc -triple armv7-linux-eabi -filetype asm -o /dev/null 2>&1 %s \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+
+	.type require_fnstart,%function
+require_fnstart:
+	.unwind_raw 0, 0
+
+@ CHECK: error: .fnstart must precede .unwind_raw directive
+@ CHECK: 	.unwind_raw 0, 0
+@ CHECK:        ^
+
+	.type check_arguments,%function
+check_arguments:
+	.fnstart
+	.unwind_raw
+	.fnend
+
+@ CHECK: error: expected expression
+@ CHECK: 	.unwind_raw
+@ CHECK:                   ^
+
+	.type check_stack_offset,%function
+check_stack_offset:
+	.fnstart
+	.unwind_raw ., 0
+	.fnend
+
+@ CHECK: error: offset must be a constant
+@ CHECK: 	.unwind_raw ., 0
+@ CHECK:                    ^
+
+	.type comma_check,%function
+comma_check:
+	.fnstart
+	.unwind_raw 0
+	.fnend
+
+@ CHECK: error: expected comma
+@ CHECK: 	.unwind_raw 0
+@ CHECK:                     ^
+
+	.type require_opcode,%function
+require_opcode:
+	.fnstart
+	.unwind_raw 0,
+	.fnend
+
+@ CHECK: error: expected opcode expression
+@ CHECK: 	.unwind_raw 0,
+@ CHECK:                      ^
+
+	.type require_opcode_constant,%function
+require_opcode_constant:
+	.fnstart
+	.unwind_raw 0, .
+	.fnend
+
+@ CHECK: error: opcode value must be a constant
+@ CHECK: 	.unwind_raw 0, .
+@ CHECK:                       ^
+
+	.type check_opcode_range,%function
+check_opcode_range:
+	.fnstart
+	.unwind_raw 0, 0x100
+	.fnend
+
+@ CHECK: error: invalid opcode
+@ CHECK: 	.unwind_raw 0, 0x100
+@ CHECK:                       ^
+
diff --git a/llvm/test/MC/ARM/eh-directive-unwind_raw.s b/llvm/test/MC/ARM/eh-directive-unwind_raw.s
new file mode 100644
index 00000000000..ab826d58e63
--- /dev/null
+++ b/llvm/test/MC/ARM/eh-directive-unwind_raw.s
@@ -0,0 +1,113 @@
+@ RUN: llvm-mc -triple armv7-linux-eabi -filetype obj -o - %s | llvm-readobj -u \
+@ RUN:   | FileCheck %s
+
+	.syntax unified
+
+	.type save,%function
+	.thumb_func
+save:
+	.fnstart
+	.unwind_raw 4, 0xb1, 0x01
+	push {r0}
+	pop {r0}
+	bx lr
+	.fnend
+
+	.type empty,%function
+	.thumb_func
+empty:
+	.fnstart
+	.unwind_raw 0, 0xb0
+	bx lr
+	.fnend
+
+	.type extended,%function
+	.thumb_func
+extended:
+	.fnstart
+	.unwind_raw 12, 0x9b, 0x40, 0x84, 0x80, 0xb0, 0xb0
+	@ .save {fp, lr}
+	stmfd sp!, {fp, lr}
+	@ .setfp fp, sp, #4
+	add fp, sp, #4
+	@ .pad #8
+	sub sp, sp, #8
+	add sp, sp, #8
+	sub fp, sp, #4
+	ldmfd sp!, {fp, lr}
+	bx lr
+	.fnend
+
+	.type refuse,%function
+	.thumb_func
+refuse:
+	.fnstart
+	.unwind_raw 0, 0x80, 0x00
+	bx lr
+	.fnend
+
+	.type stack_adjust,%function
+	.thumb_func
+stack_adjust:
+	.fnstart
+	.setfp fp, sp, #32
+	.unwind_raw 24, 0xc2
+	.fnend
+
+@ CHECK: UnwindInformation {
+@ CHECK:   UnwindIndexTable {
+@ CHECK:     SectionName: .ARM.exidx
+@ CHECK:     Entries [
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           Opcode: 0xB1
+@ CHECK:           Opcode: 0x1
+@ CHECK:           Opcode: 0xB0
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           Opcode: 0xB0
+@ CHECK:           Opcode: 0xB0
+@ CHECK:           Opcode: 0xB0
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         ExceptionHandlingTable: .ARM.extab
+@ CHECK:         Model: Compact
+@ CHECK:         PersonalityIndex: 1
+@ CHECK:         Opcodes [
+@ CHECK:           Opcode: 0x9B
+@ CHECK:           Opcode: 0x40
+@ CHECK:           Opcode: 0x84
+@ CHECK:           Opcode: 0x80
+@ CHECK:           Opcode: 0xB0
+@ CHECK:           Opcode: 0xB0
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           Opcode: 0x80
+@ CHECK:           Opcode: 0x0
+@ CHECK:           Opcode: 0xB0
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:       Entry {
+@ CHECK:         Model: Compact (Inline)
+@ CHECK:         PersonalityIndex: 0
+@ CHECK:         Opcodes [
+@ CHECK:           Opcode: 0x9B
+@ CHECK:           Opcode: 0x4D
+@ CHECK:           Opcode: 0xC2
+@ CHECK:         ]
+@ CHECK:       }
+@ CHECK:     ]
+@ CHECK:   }
+@ CHECK: }
+