summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorCraig Topper <craig.topper@gmail.com>2016-12-17 19:26:00 +0000
committerCraig Topper <craig.topper@gmail.com>2016-12-17 19:26:00 +0000
commitd3295c6a3a8f108c3e2c84dff502747482c39098 (patch)
treef60051cc4cc87e23fec342f6a9e3cc7a16919efb /llvm/test
parent81b021e7c0ea5693579d6190bd568bdb2798e9e0 (diff)
downloadbcm5719-llvm-d3295c6a3a8f108c3e2c84dff502747482c39098.tar.gz
bcm5719-llvm-d3295c6a3a8f108c3e2c84dff502747482c39098.zip
[AVX-512] Use EVEX encoded logic operations for scalar types when they are available. This gives the register allocator more registers to work with.
llvm-svn: 290049
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/X86/fp-logic-replace.ll8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/fp-logic-replace.ll b/llvm/test/CodeGen/X86/fp-logic-replace.ll
index 1afbcbf6009..628e99f8859 100644
--- a/llvm/test/CodeGen/X86/fp-logic-replace.ll
+++ b/llvm/test/CodeGen/X86/fp-logic-replace.ll
@@ -22,7 +22,7 @@ define double @FsANDPSrr(double %x, double %y) {
;
; AVX512DQ-LABEL: FsANDPSrr:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: vandps %xmm1, %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x54,0xc1]
+; AVX512DQ-NEXT: vandps %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x08,0x54,0xc1]
; AVX512DQ-NEXT: retq # encoding: [0xc3]
;
%bc1 = bitcast double %x to i64
@@ -46,7 +46,7 @@ define double @FsANDNPSrr(double %x, double %y) {
;
; AVX512DQ-LABEL: FsANDNPSrr:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: vandnps %xmm0, %xmm1, %xmm0 # encoding: [0xc5,0xf0,0x55,0xc0]
+; AVX512DQ-NEXT: vandnps %xmm0, %xmm1, %xmm0 # encoding: [0x62,0xf1,0x74,0x08,0x55,0xc0]
; AVX512DQ-NEXT: retq # encoding: [0xc3]
;
%bc1 = bitcast double %x to i64
@@ -70,7 +70,7 @@ define double @FsORPSrr(double %x, double %y) {
;
; AVX512DQ-LABEL: FsORPSrr:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: vorps %xmm1, %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x56,0xc1]
+; AVX512DQ-NEXT: vorps %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x08,0x56,0xc1]
; AVX512DQ-NEXT: retq # encoding: [0xc3]
;
%bc1 = bitcast double %x to i64
@@ -93,7 +93,7 @@ define double @FsXORPSrr(double %x, double %y) {
;
; AVX512DQ-LABEL: FsXORPSrr:
; AVX512DQ: # BB#0:
-; AVX512DQ-NEXT: vxorps %xmm1, %xmm0, %xmm0 # encoding: [0xc5,0xf8,0x57,0xc1]
+; AVX512DQ-NEXT: vxorps %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf1,0x7c,0x08,0x57,0xc1]
; AVX512DQ-NEXT: retq # encoding: [0xc3]
;
%bc1 = bitcast double %x to i64
OpenPOWER on IntegriCloud