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| author | Kit Barton <kbarton@ca.ibm.com> | 2017-02-01 14:33:57 +0000 |
|---|---|---|
| committer | Kit Barton <kbarton@ca.ibm.com> | 2017-02-01 14:33:57 +0000 |
| commit | d26978796ed84af4d32aa6dae86d6d327eef74e2 (patch) | |
| tree | 3d41f74450ba5b2e8b97fe842950c07eacf47d40 /llvm/test | |
| parent | 816ae4b0dfac9a2bd964e8c4dae6dd7183ceb92a (diff) | |
| download | bcm5719-llvm-d26978796ed84af4d32aa6dae86d6d327eef74e2.tar.gz bcm5719-llvm-d26978796ed84af4d32aa6dae86d6d327eef74e2.zip | |
[PowerPC] Fix sjlj pseduo instructions to use G8RC_NOX0 register class
The the following instructions:
- LD/LWZ (expanded from sjLj pseudo-instructions)
- LXVL/LXVLL vector loads
- STXVL/STXVLL vector stores
all require G8RC_NO0X class registers for RA.
Differential Revision: https://reviews.llvm.org/D29289
Committed for Lei Huang
llvm-svn: 293769
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/sjlj_no0x.ll | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/sjlj_no0x.ll b/llvm/test/CodeGen/PowerPC/sjlj_no0x.ll new file mode 100644 index 00000000000..2018bcbbc93 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/sjlj_no0x.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s + +target datalayout = "e-m:e-i64:64-n32:64" +target triple = "powerpc64le-unknown-linux-gnu" + +; Function Attrs: noinline nounwind +define void @_Z23BuiltinLongJmpFunc1_bufv() #0 { +entry: + call void @llvm.eh.sjlj.longjmp(i8* bitcast (void ()* @_Z23BuiltinLongJmpFunc1_bufv to i8*)) + unreachable + +; CHECK: @_Z23BuiltinLongJmpFunc1_bufv +; CHECK: addis [[REG:[0-9]+]], 2, .LC0@toc@ha +; CHECK: ld 31, 0([[REG]]) +; CHECK: ld [[REG2:[0-9]+]], 8([[REG]]) +; CHECK-DAG: ld 1, 16([[REG]]) +; CHECK-DAG: ld 30, 32([[REG]]) +; CHECK-DAG: ld 2, 24([[REG]]) +; CHECK-DAG: mtctr [[REG2]] +; CHECK: bctr + +return: ; No predecessors! + ret void +} + +; Function Attrs: noreturn nounwind +declare void @llvm.eh.sjlj.longjmp(i8*) #1 |
