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| author | Jun Bum Lim <junbuml@codeaurora.org> | 2016-03-31 14:47:24 +0000 |
|---|---|---|
| committer | Jun Bum Lim <junbuml@codeaurora.org> | 2016-03-31 14:47:24 +0000 |
| commit | cf9744367b6e9dc99a07c16894a51e6b9a5e7348 (patch) | |
| tree | 4b321370633399c2d1206bc3d5393ae087839e59 /llvm/test | |
| parent | 1931b01a6456182fe27b0fc840c689a38279ae59 (diff) | |
| download | bcm5719-llvm-cf9744367b6e9dc99a07c16894a51e6b9a5e7348.tar.gz bcm5719-llvm-cf9744367b6e9dc99a07c16894a51e6b9a5e7348.zip | |
[AArch64] Handle missing store pair opportunity
Summary:
This change will handle missing store pair opportunity where the first store
instruction stores zero followed by the non-zero store. For example, this change
will convert :
str wzr, [x8]
str w1, [x8, #4]
into:
stp wzr, w1, [x8]
Reviewers: jmolloy, t.p.northover, mcrosier
Subscribers: flyingforyou, aemerson, rengolin, mcrosier, llvm-commits
Differential Revision: http://reviews.llvm.org/D18570
llvm-svn: 265021
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-narrow-ldst-merge.ll | 30 |
1 files changed, 22 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-narrow-ldst-merge.ll b/llvm/test/CodeGen/AArch64/arm64-narrow-ldst-merge.ll index 77b5a06269c..65e209493a9 100644 --- a/llvm/test/CodeGen/AArch64/arm64-narrow-ldst-merge.ll +++ b/llvm/test/CodeGen/AArch64/arm64-narrow-ldst-merge.ll @@ -353,8 +353,8 @@ entry: ret void } -;CHECK-LABEL: Strw_zero -;CHECK : str xzr +; CHECK-LABEL: Strw_zero +; CHECK: str xzr define void @Strw_zero(i32* nocapture %P, i32 %n) { entry: %idxprom = sext i32 %n to i64 @@ -367,8 +367,22 @@ entry: ret void } -;CHECK-LABEL: Strw_zero_4 -;CHECK : stp xzr +; CHECK-LABEL: Strw_zero_nonzero +; CHECK: stp wzr, w1 +define void @Strw_zero_nonzero(i32* nocapture %P, i32 %n) { +entry: + %idxprom = sext i32 %n to i64 + %arrayidx = getelementptr inbounds i32, i32* %P, i64 %idxprom + store i32 0, i32* %arrayidx + %add = add nsw i32 %n, 1 + %idxprom1 = sext i32 %add to i64 + %arrayidx2 = getelementptr inbounds i32, i32* %P, i64 %idxprom1 + store i32 %n, i32* %arrayidx2 + ret void +} + +; CHECK-LABEL: Strw_zero_4 +; CHECK: stp xzr define void @Strw_zero_4(i32* nocapture %P, i32 %n) { entry: %idxprom = sext i32 %n to i64 @@ -442,8 +456,8 @@ entry: ret void } -;CHECK-LABEL: Sturw_zero -;CHECK : stur xzr +; CHECK-LABEL: Sturw_zero +; CHECK: stur xzr define void @Sturw_zero(i32* nocapture %P, i32 %n) { entry: %sub = add nsw i32 %n, -3 @@ -457,8 +471,8 @@ entry: ret void } -;CHECK-LABEL: Sturw_zero_4 -;CHECK : str xzr +; CHECK-LABEL: Sturw_zero_4 +; CHECK: stp xzr, xzr define void @Sturw_zero_4(i32* nocapture %P, i32 %n) { entry: %sub = add nsw i32 %n, -3 |
