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authorTim Northover <tnorthover@apple.com>2017-12-10 08:43:19 +0000
committerTim Northover <tnorthover@apple.com>2017-12-10 08:43:19 +0000
commitcf4701bb89fcf1aa536b2008320690d85ce43c40 (patch)
treeddd6496b4243c61421f9ee3a057f8345ebea95dc /llvm/test
parent8f1bc370e2a8d9a55c4c0b9c958a5a21c59e8180 (diff)
downloadbcm5719-llvm-cf4701bb89fcf1aa536b2008320690d85ce43c40.tar.gz
bcm5719-llvm-cf4701bb89fcf1aa536b2008320690d85ce43c40.zip
PowerPC: support external pid instructions in MC layer.
This adds assembly & disassembly support for the e500mc "external pid" instructions. See https://reviews.llvm.org/D39249. Patch by vit9696 <vit9696@avp.su> llvm-svn: 320287
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/MC/Disassembler/PowerPC/ppc32-extpid-e500.txt34
-rw-r--r--llvm/test/MC/PowerPC/ppc32-extpid-e500.s34
2 files changed, 68 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc32-extpid-e500.txt b/llvm/test/MC/Disassembler/PowerPC/ppc32-extpid-e500.txt
new file mode 100644
index 00000000000..874895ace47
--- /dev/null
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc32-extpid-e500.txt
@@ -0,0 +1,34 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc-unknown-unknown | FileCheck %s
+
+# Extended PID instructions specific to the e500 / e500mc cores:
+
+# CHECK: lbepx 1, 2, 3
+0x7c 0x22 0x18 0xbe
+# CHECK: lfdepx 4, 5, 6
+0x7c 0x85 0x34 0xbe
+# CHECK: lhepx 7, 8, 9
+0x7c 0xe8 0x4a 0x3e
+# CHECK: lwepx 10, 11, 12
+0x7d 0x4b 0x60 0x3e
+# CHECK: stbepx 13, 14, 15
+0x7d 0xae 0x79 0xbe
+# CHECK: stfdepx 16, 17, 18
+0x7e 0x11 0x95 0xbe
+# CHECK: sthepx 19, 20, 21
+0x7e 0x74 0xab 0x3e
+# CHECK: stwepx 22, 23, 24
+0x7e 0xd7 0xc1 0x3e
+# CHECK: dcbfep 25, 26
+0x7c 0x19 0xd0 0xfe
+# CHECK: dcbstep 27, 28
+0x7c 0x1b 0xe0 0x7e
+# CHECK: dcbtep 29, 30, 31
+0x7f 0xbe 0xfa 0x7e
+# CHECK: dcbtstep 0, 1, 2
+0x7c 0x01 0x11 0xfe
+# CHECK: dcbzep 3, 4
+0x7c 0x03 0x27 0xfe
+# CHECK: dcbzlep 5, 6
+0x7c 0x25 0x37 0xfe
+# CHECK: icbiep 7, 8
+0x7c 0x07 0x47 0xbe
diff --git a/llvm/test/MC/PowerPC/ppc32-extpid-e500.s b/llvm/test/MC/PowerPC/ppc32-extpid-e500.s
new file mode 100644
index 00000000000..c2a649444d3
--- /dev/null
+++ b/llvm/test/MC/PowerPC/ppc32-extpid-e500.s
@@ -0,0 +1,34 @@
+# RUN: llvm-mc -triple powerpc-unknown-unknown --show-encoding %s | FileCheck %s
+
+# Extended PID instructions specific to the e500 / e500mc cores:
+
+# CHECK: lbepx 1, 2, 3 # encoding: [0x7c,0x22,0x18,0xbe]
+ lbepx 1, 2, 3
+# CHECK: lfdepx 4, 5, 6 # encoding: [0x7c,0x85,0x34,0xbe]
+ lfdepx 4, 5, 6
+# CHECK: lhepx 7, 8, 9 # encoding: [0x7c,0xe8,0x4a,0x3e]
+ lhepx 7, 8, 9
+# CHECK: lwepx 10, 11, 12 # encoding: [0x7d,0x4b,0x60,0x3e]
+ lwepx 10, 11, 12
+# CHECK: stbepx 13, 14, 15 # encoding: [0x7d,0xae,0x79,0xbe]
+ stbepx 13, 14, 15
+# CHECK: stfdepx 16, 17, 18 # encoding: [0x7e,0x11,0x95,0xbe]
+ stfdepx 16, 17, 18
+# CHECK: sthepx 19, 20, 21 # encoding: [0x7e,0x74,0xab,0x3e]
+ sthepx 19, 20, 21
+# CHECK: stwepx 22, 23, 24 # encoding: [0x7e,0xd7,0xc1,0x3e]
+ stwepx 22, 23, 24
+# CHECK: dcbfep 25, 26 # encoding: [0x7c,0x19,0xd0,0xfe]
+ dcbfep 25, 26
+# CHECK: dcbstep 27, 28 # encoding: [0x7c,0x1b,0xe0,0x7e]
+ dcbstep 27, 28
+# CHECK: dcbtep 29, 30, 31 # encoding: [0x7f,0xbe,0xfa,0x7e]
+ dcbtep 29, 30, 31
+# CHECK: dcbtstep 0, 1, 2 # encoding: [0x7c,0x01,0x11,0xfe]
+ dcbtstep 0, 1, 2
+# CHECK: dcbzep 3, 4 # encoding: [0x7c,0x03,0x27,0xfe]
+ dcbzep 3, 4
+# CHECK: dcbzlep 5, 6 # encoding: [0x7c,0x25,0x37,0xfe]
+ dcbzlep 5, 6
+# CHECK: icbiep 7, 8 # encoding: [0x7c,0x07,0x47,0xbe]
+ icbiep 7, 8
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