Revert r248483, r242546, r242545, and r242409 - absdiff intrinsics

After much discussion, ending here:

  http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151123/315620.html

it has been decided that, instead of having the vectorizer directly generate
special absdiff and horizontal-add intrinsics, we'll recognize the relevant
reduction patterns during CodeGen. Accordingly, these intrinsics are not needed
(the operations they represent can be pattern matched, as is already done in
some backends). Thus, we're backing these out in favor of the current
development work.

r248483 - Codegen: Fix llvm.*absdiff semantic.
r242546 - [ARM] Use [SU]ABSDIFF nodes instead of intrinsics for VABD/VABA
r242545 - [AArch64] Use [SU]ABSDIFF nodes instead of intrinsics for ABD/ABA
r242409 - [Codegen] Add intrinsics 'absdiff' and corresponding SDNodes for absolute difference operation

llvm-svn: 255387

2 files changed, 0 insertions, 210 deletions

diff --git a/llvm/test/CodeGen/X86/absdiff_128.ll b/llvm/test/CodeGen/X86/absdiff_128.ll
deleted file mode 100644
index 24055ccc79e..00000000000
--- a/llvm/test/CodeGen/X86/absdiff_128.ll
+++ /dev/null
@@ -1,181 +0,0 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-
-declare <4 x i8> @llvm.uabsdiff.v4i8(<4 x i8>, <4 x i8>)
-
-define <4 x i8> @test_uabsdiff_v4i8_expand(<4 x i8> %a1, <4 x i8> %a2) {
-; CHECK-LABEL: test_uabsdiff_v4i8_expand
-; CHECK:      pshufd
-; CHECK:      movd
-; CHECK:      subl
-; CHECK:      punpckldq
-; CHECK-DAG:  movd   %xmm1, [[SRC:%.*]]
-; CHECK-DAG:  movd   %xmm0, [[DST:%.*]]
-; CHECK:      subl [[SRC]], [[DST]]
-; CHECK:      movd
-; CHECK:      pshufd
-; CHECK:      movd
-; CHECK:      punpckldq
-; CHECK:      movdqa
-; CHECK:      retq
-
-  %1 = call <4 x i8> @llvm.uabsdiff.v4i8(<4 x i8> %a1, <4 x i8> %a2)
-  ret <4 x i8> %1
-}
-
-declare <4 x i8> @llvm.sabsdiff.v4i8(<4 x i8>, <4 x i8>)
-
-define <4 x i8> @test_sabsdiff_v4i8_expand(<4 x i8> %a1, <4 x i8> %a2) {
-; CHECK-LABEL: test_sabsdiff_v4i8_expand
-; CHECK:      psubd
-; CHECK:      pcmpgtd
-; CHECK:      pcmpeqd
-; CHECK:      pxor
-; CHECK-DAG:  psubd  {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  [[SRC1]], [[DST:%xmm[0-9]+]]
-; CHECK:      por    [[SRC2]], [[DST]]
-; CHECK:      retq
-
-  %1 = call <4 x i8> @llvm.sabsdiff.v4i8(<4 x i8> %a1, <4 x i8> %a2)
-  ret <4 x i8> %1
-}
-
-declare <8 x i8> @llvm.sabsdiff.v8i8(<8 x i8>, <8 x i8>)
-
-define <8 x i8> @test_sabsdiff_v8i8_expand(<8 x i8> %a1, <8 x i8> %a2) {
-; CHECK-LABEL: test_sabsdiff_v8i8_expand
-; CHECK:      psubw
-; CHECK:      pcmpgtw
-; CHECK:      pcmpeqd
-; CHECK:      pxor
-; CHECK-DAG:  psubw  {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  [[SRC1]], [[DST:%xmm[0-9]+]]
-; CHECK:      por    [[SRC2]], [[DST]]
-; CHECK:      retq
-
-  %1 = call <8 x i8> @llvm.sabsdiff.v8i8(<8 x i8> %a1, <8 x i8> %a2)
-  ret <8 x i8> %1
-}
-
-declare <16 x i8> @llvm.uabsdiff.v16i8(<16 x i8>, <16 x i8>)
-
-define <16 x i8> @test_uabsdiff_v16i8_expand(<16 x i8> %a1, <16 x i8> %a2) {
-; CHECK-LABEL: test_uabsdiff_v16i8_expand
-; CHECK:      movd
-; CHECK:      movzbl
-; CHECK:      movzbl
-; CHECK:      subl
-; CHECK:      punpcklbw
-; CHECK:      retq
-
-  %1 = call <16 x i8> @llvm.uabsdiff.v16i8(<16 x i8> %a1, <16 x i8> %a2)
-  ret <16 x i8> %1
-}
-
-declare <8 x i16> @llvm.uabsdiff.v8i16(<8 x i16>, <8 x i16>)
-
-define <8 x i16> @test_uabsdiff_v8i16_expand(<8 x i16> %a1, <8 x i16> %a2) {
-; CHECK-LABEL: test_uabsdiff_v8i16_expand
-; CHECK:      pextrw
-; CHECK:      pextrw
-; CHECK:      subl
-; CHECK:      punpcklwd
-; CHECK:      retq
-
-  %1 = call <8 x i16> @llvm.uabsdiff.v8i16(<8 x i16> %a1, <8 x i16> %a2)
-  ret <8 x i16> %1
-}
-
-declare <8 x i16> @llvm.sabsdiff.v8i16(<8 x i16>, <8 x i16>)
-
-define <8 x i16> @test_sabsdiff_v8i16_expand(<8 x i16> %a1, <8 x i16> %a2) {
-; CHECK-LABEL: test_sabsdiff_v8i16_expand
-; CHECK:      psubw
-; CHECK:      pcmpgtw
-; CHECK:      pcmpeqd
-; CHECK:      pxor
-; CHECK-DAG:  psubw  {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  [[SRC1]], [[DST:%xmm[0-9]+]]
-; CHECK:      por    [[SRC2]], [[DST]]
-; CHECK:      retq
-
-  %1 = call <8 x i16> @llvm.sabsdiff.v8i16(<8 x i16> %a1, <8 x i16> %a2)
-  ret <8 x i16> %1
-}
-
-declare <4 x i32> @llvm.sabsdiff.v4i32(<4 x i32>, <4 x i32>)
-
-define <4 x i32> @test_sabsdiff_v4i32_expand(<4 x i32> %a1, <4 x i32> %a2) {
-; CHECK-LABEL: test_sabsdiff_v4i32_expand
-; CHECK:      psubd
-; CHECK:      pcmpgtd
-; CHECK:      pcmpeqd
-; CHECK:      pxor
-; CHECK-DAG:  psubd  {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  [[SRC1]], [[DST:%xmm[0-9]+]]
-; CHECK:      por    [[SRC2]], [[DST]]
-; CHECK:      retq
-  %1 = call <4 x i32> @llvm.sabsdiff.v4i32(<4 x i32> %a1, <4 x i32> %a2)
-  ret <4 x i32> %1
-}
-
-declare <4 x i32> @llvm.uabsdiff.v4i32(<4 x i32>, <4 x i32>)
-
-define <4 x i32> @test_uabsdiff_v4i32_expand(<4 x i32> %a1, <4 x i32> %a2) {
-; CHECK-LABEL: test_uabsdiff_v4i32_expand
-; CHECK:      pshufd
-; CHECK:      movd
-; CHECK:      subl
-; CHECK:      punpckldq
-; CHECK-DAG:  movd   %xmm1, [[SRC:%.*]]
-; CHECK-DAG:  movd   %xmm0, [[DST:%.*]]
-; CHECK:      subl [[SRC]], [[DST]]
-; CHECK:      movd
-; CHECK:      pshufd
-; CHECK:      movd
-; CHECK:      punpckldq
-; CHECK:      movdqa
-; CHECK:      retq
-
-  %1 = call <4 x i32> @llvm.uabsdiff.v4i32(<4 x i32> %a1, <4 x i32> %a2)
-  ret <4 x i32> %1
-}
-
-declare <2 x i32> @llvm.sabsdiff.v2i32(<2 x i32>, <2 x i32>)
-
-define <2 x i32> @test_sabsdiff_v2i32_expand(<2 x i32> %a1, <2 x i32> %a2) {
-; CHECK-LABEL: test_sabsdiff_v2i32_expand
-; CHECK:      psubq
-; CHECK:      pcmpgtd
-; CHECK:      pcmpeqd
-; CHECK:      pxor
-; CHECK-DAG:  psubq  {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  [[SRC1]], [[DST:%xmm[0-9]+]]
-; CHECK:      por    [[SRC2]], [[DST]]
-; CHECK:      retq
-
-  %1 = call <2 x i32> @llvm.sabsdiff.v2i32(<2 x i32> %a1, <2 x i32> %a2)
-  ret <2 x i32> %1
-}
-
-declare <2 x i64> @llvm.sabsdiff.v2i64(<2 x i64>, <2 x i64>)
-
-define <2 x i64> @test_sabsdiff_v2i64_expand(<2 x i64> %a1, <2 x i64> %a2) {
-; CHECK-LABEL: test_sabsdiff_v2i64_expand
-; CHECK:      psubq
-; CHECK:      pcmpgtd
-; CHECK:      pcmpeqd
-; CHECK:      pxor
-; CHECK-DAG:  psubq  {{%xmm[0-9]+}}, [[SRC1:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  {{%xmm[0-9]+}}, [[SRC2:%xmm[0-9]+]]
-; CHECK-DAG:  pandn  [[SRC1]], [[DST:%xmm[0-9]+]]
-; CHECK:      por    [[SRC2]], [[DST]]
-; CHECK:      retq
-
-  %1 = call <2 x i64> @llvm.sabsdiff.v2i64(<2 x i64> %a1, <2 x i64> %a2)
-  ret <2 x i64> %1
-}
diff --git a/llvm/test/CodeGen/X86/absdiff_256.ll b/llvm/test/CodeGen/X86/absdiff_256.ll
deleted file mode 100644
index acc8a1fa51d..00000000000
--- a/llvm/test/CodeGen/X86/absdiff_256.ll
+++ /dev/null
@@ -1,29 +0,0 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown  | FileCheck %s
-
-declare <16 x i16> @llvm.sabsdiff.v16i16(<16 x i16>, <16 x i16>)
-
-define <16 x i16> @test_sabsdiff_v16i16_expand(<16 x i16> %a1, <16 x i16> %a2) {
-; CHECK-LABEL: test_sabsdiff_v16i16_expand:
-; CHECK:       # BB#0:
-; CHECK:         psubw
-; CHECK:         pxor
-; CHECK:         pcmpgtw
-; CHECK:         movdqa
-; CHECK:         pandn
-; CHECK:         pxor
-; CHECK:         psubw
-; CHECK:         pcmpeqd
-; CHECK:         pxor
-; CHECK:         pandn
-; CHECK:         por
-; CHECK:         pcmpgtw
-; CHECK-DAG:     psubw {{%xmm[0-9]+}}, [[SRC:%xmm[0-9]+]]
-; CHECK-DAG:     pxor {{%xmm[0-9]+}}, [[DST:%xmm[0-9]+]]
-; CHECK:         pandn [[SRC]], [[DST]]
-; CHECK:         por
-; CHECK:         movdqa
-; CHECK:         retq
-  %1 = call <16 x i16> @llvm.sabsdiff.v16i16(<16 x i16> %a1, <16 x i16> %a2)
-  ret <16 x i16> %1
-}
-