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| author | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-10-09 17:51:35 +0000 |
|---|---|---|
| committer | Bill Schmidt <wschmidt@linux.vnet.ibm.com> | 2014-10-09 17:51:35 +0000 |
| commit | cb34fd09cd062e81c0c13d5cfa02dd8f1c44e229 (patch) | |
| tree | 2ac263d2c2a95c384a579bd7206209946456a835 /llvm/test | |
| parent | 98d703a663f6c9d2a8f2c7b51d7e3d85d3fbac0d (diff) | |
| download | bcm5719-llvm-cb34fd09cd062e81c0c13d5cfa02dd8f1c44e229.tar.gz bcm5719-llvm-cb34fd09cd062e81c0c13d5cfa02dd8f1c44e229.zip | |
[PPC64] VSX indexed-form loads use wrong instruction format
The VSX instruction definitions for lxsdx, lxvd2x, lxvdsx, and lxvw4x
incorrectly use the XForm_1 instruction format, rather than the
XX1Form instruction format. This is likely a pasto when creating
these instructions, which were based on lvx and so forth. This patch
uses the correct format.
The existing reformatting test (test/MC/PowerPC/vsx.s) missed this
because the two formats differ only in that XX1Form has an extension
to the target register field in bit 31. The tests for these
instructions used a target register of 7, so the default of 0 in bit
31 for XForm_1 didn't expose a problem. For register numbers 32-63
this would be noticeable. I've changed the test to use higher
register numbers to verify my change is effective.
llvm-svn: 219416
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/PowerPC/vsx.s | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/llvm/test/MC/PowerPC/vsx.s b/llvm/test/MC/PowerPC/vsx.s index d292ddaf5cc..b355ba37b80 100644 --- a/llvm/test/MC/PowerPC/vsx.s +++ b/llvm/test/MC/PowerPC/vsx.s @@ -1,27 +1,27 @@ # RUN: llvm-mc -triple powerpc64-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-BE %s # RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu --show-encoding %s | FileCheck -check-prefix=CHECK-LE %s -# CHECK-BE: lxsdx 7, 5, 31 # encoding: [0x7c,0xe5,0xfc,0x98] -# CHECK-LE: lxsdx 7, 5, 31 # encoding: [0x98,0xfc,0xe5,0x7c] - lxsdx 7, 5, 31 -# CHECK-BE: lxvd2x 7, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x98] -# CHECK-LE: lxvd2x 7, 5, 31 # encoding: [0x98,0xfe,0xe5,0x7c] - lxvd2x 7, 5, 31 -# CHECK-BE: lxvdsx 7, 5, 31 # encoding: [0x7c,0xe5,0xfa,0x98] -# CHECK-LE: lxvdsx 7, 5, 31 # encoding: [0x98,0xfa,0xe5,0x7c] - lxvdsx 7, 5, 31 -# CHECK-BE: lxvw4x 7, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x18] -# CHECK-LE: lxvw4x 7, 5, 31 # encoding: [0x18,0xfe,0xe5,0x7c] - lxvw4x 7, 5, 31 -# CHECK-BE: stxsdx 8, 5, 31 # encoding: [0x7d,0x05,0xfd,0x98] -# CHECK-LE: stxsdx 8, 5, 31 # encoding: [0x98,0xfd,0x05,0x7d] - stxsdx 8, 5, 31 -# CHECK-BE: stxvd2x 8, 5, 31 # encoding: [0x7d,0x05,0xff,0x98] -# CHECK-LE: stxvd2x 8, 5, 31 # encoding: [0x98,0xff,0x05,0x7d] - stxvd2x 8, 5, 31 -# CHECK-BE: stxvw4x 8, 5, 31 # encoding: [0x7d,0x05,0xff,0x18] -# CHECK-LE: stxvw4x 8, 5, 31 # encoding: [0x18,0xff,0x05,0x7d] - stxvw4x 8, 5, 31 +# CHECK-BE: lxsdx 39, 5, 31 # encoding: [0x7c,0xe5,0xfc,0x99] +# CHECK-LE: lxsdx 39, 5, 31 # encoding: [0x99,0xfc,0xe5,0x7c] + lxsdx 39, 5, 31 +# CHECK-BE: lxvd2x 39, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x99] +# CHECK-LE: lxvd2x 39, 5, 31 # encoding: [0x99,0xfe,0xe5,0x7c] + lxvd2x 39, 5, 31 +# CHECK-BE: lxvdsx 39, 5, 31 # encoding: [0x7c,0xe5,0xfa,0x99] +# CHECK-LE: lxvdsx 39, 5, 31 # encoding: [0x99,0xfa,0xe5,0x7c] + lxvdsx 39, 5, 31 +# CHECK-BE: lxvw4x 39, 5, 31 # encoding: [0x7c,0xe5,0xfe,0x19] +# CHECK-LE: lxvw4x 39, 5, 31 # encoding: [0x19,0xfe,0xe5,0x7c] + lxvw4x 39, 5, 31 +# CHECK-BE: stxsdx 40, 5, 31 # encoding: [0x7d,0x05,0xfd,0x99] +# CHECK-LE: stxsdx 40, 5, 31 # encoding: [0x99,0xfd,0x05,0x7d] + stxsdx 40, 5, 31 +# CHECK-BE: stxvd2x 40, 5, 31 # encoding: [0x7d,0x05,0xff,0x99] +# CHECK-LE: stxvd2x 40, 5, 31 # encoding: [0x99,0xff,0x05,0x7d] + stxvd2x 40, 5, 31 +# CHECK-BE: stxvw4x 40, 5, 31 # encoding: [0x7d,0x05,0xff,0x19] +# CHECK-LE: stxvw4x 40, 5, 31 # encoding: [0x19,0xff,0x05,0x7d] + stxvw4x 40, 5, 31 # CHECK-BE: xsabsdp 7, 27 # encoding: [0xf0,0xe0,0xdd,0x64] # CHECK-LE: xsabsdp 7, 27 # encoding: [0x64,0xdd,0xe0,0xf0] xsabsdp 7, 27 |
