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authorSanjay Patel <spatel@rotateright.com>2017-04-20 22:33:54 +0000
committerSanjay Patel <spatel@rotateright.com>2017-04-20 22:33:54 +0000
commitc9485ca895a2f45b9f6b55c26ea624da8c152c5d (patch)
tree8c9a18887e3a117526721d0384f5dd2ebbe14813 /llvm/test
parentdc07769c904d8e0866997f7fb57f846f183ab3d4 (diff)
downloadbcm5719-llvm-c9485ca895a2f45b9f6b55c26ea624da8c152c5d.tar.gz
bcm5719-llvm-c9485ca895a2f45b9f6b55c26ea624da8c152c5d.zip
[InstCombine] allow shl+shr demanded bits folds with splat constants
llvm-svn: 300911
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/Transforms/InstCombine/shift.ll10
1 files changed, 4 insertions, 6 deletions
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index 6a6c1880c5e..ce8e2fcd38b 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -1075,9 +1075,8 @@ define i32 @test54(i32 %x) {
define <2 x i32> @test54_splat_vec(<2 x i32> %x) {
; CHECK-LABEL: @test54_splat_vec(
-; CHECK-NEXT: [[SHR2:%.*]] = lshr <2 x i32> %x, <i32 1, i32 1>
-; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[SHR2]], <i32 4, i32 4>
-; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[SHL]], <i32 16, i32 16>
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[TMP1]], <i32 16, i32 16>
; CHECK-NEXT: ret <2 x i32> [[AND]]
;
%shr2 = lshr <2 x i32> %x, <i32 1, i32 1>
@@ -1138,9 +1137,8 @@ define i32 @test58(i32 %x) {
define <2 x i32> @test58_splat_vec(<2 x i32> %x) {
; CHECK-LABEL: @test58_splat_vec(
-; CHECK-NEXT: [[SHR:%.*]] = ashr <2 x i32> %x, <i32 4, i32 4>
-; CHECK-NEXT: [[SHL:%.*]] = shl nsw <2 x i32> [[SHR]], <i32 1, i32 1>
-; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[SHL]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP1:%.*]] = ashr <2 x i32> %x, <i32 3, i32 3>
+; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i32> [[OR]]
;
%shr = ashr <2 x i32> %x, <i32 4, i32 4>
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