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| author | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
|---|---|---|
| committer | Michael Kuperstein <michael.m.kuperstein@intel.com> | 2015-05-13 10:28:46 +0000 |
| commit | c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23 (patch) | |
| tree | 94dc79d894cf6e87f33787cba82f5a731a3a96be /llvm/test | |
| parent | a7b142603da5ae63232b727bb20b997cadbaf4bb (diff) | |
| download | bcm5719-llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.tar.gz bcm5719-llvm-c3434b390d6ea255aa4bd82cfd6ddcdee99e4a23.zip | |
Reverting r237234, "Use std::bitset for SubtargetFeatures"
The buildbots are still not satisfied.
MIPS and ARM are failing (even though at least MIPS was expected to pass).
llvm-svn: 237245
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/TableGen/AsmPredicateCondsEmission.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/TableGen/AsmPredicateCondsEmission.td b/llvm/test/TableGen/AsmPredicateCondsEmission.td index c1fe0d2aba2..ba5898fbebd 100644 --- a/llvm/test/TableGen/AsmPredicateCondsEmission.td +++ b/llvm/test/TableGen/AsmPredicateCondsEmission.td @@ -28,4 +28,4 @@ def foo : Instruction { let Predicates = [Pred1, Pred2]; } -// CHECK: return (Bits[arch::AssemblerCondition2]); +// CHECK: return ((Bits & arch::AssemblerCondition2)); |
