GlobalISel: support same-size casts on AArch64.

Mostly Ahmed's work again, I'm just sprucing things up slightly before
committing.

llvm-svn: 283952

1 files changed, 31 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
index 2d3c9f2512e..af4bde9237c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
@@ -86,6 +86,8 @@
   define void @anyext_gpr() { ret void }
   define void @zext_gpr() { ret void }
   define void @sext_gpr() { ret void }
+
+  define void @casts() { ret void }
 ...
 
 ---
@@ -1423,3 +1425,32 @@ body:             |
     %2(s8) = COPY %w0
     %3(s32) = G_SEXT %2
 ...
+
+---
+# CHECK-LABEL: name: casts
+name:            casts
+legalized:       true
+regBankSelected: true
+
+# CHECK:      registers:
+# CHECK-NEXT:  - { id: 0, class: gpr64 }
+# CHECK-NEXT:  - { id: 1, class: fpr64 }
+registers:
+  - { id: 0, class: gpr }
+  - { id: 1, class: fpr }
+  - { id: 2, class: gpr }
+  - { id: 3, class: gpr }
+
+# CHECK:  body:
+# CHECK:    %0 = COPY %x0
+# CHECK:    %1 = COPY %0
+# CHECK:    %2 = COPY %0
+# CHECK:    %3 = COPY %2
+body:             |
+  bb.0:
+    liveins: %w0
+    %0(s64) = COPY %x0
+    %1(<8 x s8>) = G_BITCAST %0(s64)
+    %2(p0) = G_INTTOPTR %0
+    %3(s64) = G_PTRTOINT %2
+...