summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
authorKyle Butt <kyle+llvm@iteratee.net>2016-01-08 02:06:19 +0000
committerKyle Butt <kyle+llvm@iteratee.net>2016-01-08 02:06:19 +0000
commitbfcff3856a5590d3187999e6c6c08057ef36e261 (patch)
tree0b9e90447b764f0928a539cbd3acaf8ab4155c6d /llvm/test
parentf6594a06f75b05d7bd876ca8314456680d17dc49 (diff)
downloadbcm5719-llvm-bfcff3856a5590d3187999e6c6c08057ef36e261.tar.gz
bcm5719-llvm-bfcff3856a5590d3187999e6c6c08057ef36e261.zip
Add call sequence start and end for __tls_get_addr
This is a fix for bug http://llvm.org/bugs/show_bug.cgi?id=25839. For a PIC TLS variable access in a function, prologue (mflr followed by std and stdu) gets scheduled after a tls_get_addr call. tls_get_addr messed up LR but no one saves/restores it. Also added a test for save/restore clobbered registers during calling __tls_get_addr. Patch by Tim Shen llvm-svn: 257137
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/PowerPC/tls_get_addr_clobbers.ll54
-rw-r--r--llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll32
2 files changed, 86 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/tls_get_addr_clobbers.ll b/llvm/test/CodeGen/PowerPC/tls_get_addr_clobbers.ll
new file mode 100644
index 00000000000..400a1f297f0
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/tls_get_addr_clobbers.ll
@@ -0,0 +1,54 @@
+; RUN: llc -mtriple="powerpc64le-unknown-linux-gnu" -relocation-model=pic < %s | FileCheck %s
+
+@a = thread_local global i32* null, align 8
+
+define void @test_foo(i32* nocapture %x01, i32* nocapture %x02, i32* nocapture %x03, i32* nocapture %x04, i32* nocapture %x05, i32* nocapture %x06, i32* nocapture %x07, i32* nocapture %x08) #0 {
+entry:
+
+; CHECK-LABEL: test_foo:
+; CHECK: stdu 1, {{-?[0-9]+}}(1)
+; CHECK-DAG: mr [[BACKUP_3:[0-9]+]], 3
+; CHECK-DAG: mr [[BACKUP_4:[0-9]+]], 4
+; CHECK-DAG: mr [[BACKUP_5:[0-9]+]], 5
+; CHECK-DAG: mr [[BACKUP_6:[0-9]+]], 6
+; CHECK-DAG: mr [[BACKUP_7:[0-9]+]], 7
+; CHECK-DAG: mr [[BACKUP_8:[0-9]+]], 8
+; CHECK-DAG: mr [[BACKUP_9:[0-9]+]], 9
+; CHECK-DAG: mr [[BACKUP_10:[0-9]+]], 10
+; CHECK-DAG: std [[BACKUP_3]], {{[0-9]+}}(1)
+; CHECK-DAG: std [[BACKUP_4]], {{[0-9]+}}(1)
+; CHECK-DAG: std [[BACKUP_5]], {{[0-9]+}}(1)
+; CHECK-DAG: std [[BACKUP_6]], {{[0-9]+}}(1)
+; CHECK-DAG: std [[BACKUP_7]], {{[0-9]+}}(1)
+; CHECK-DAG: std [[BACKUP_8]], {{[0-9]+}}(1)
+; CHECK-DAG: std [[BACKUP_9]], {{[0-9]+}}(1)
+; CHECK-DAG: std [[BACKUP_10]], {{[0-9]+}}(1)
+; CHECK: bl __tls_get_addr
+; CHECK-DAG: stw 3, 0([[BACKUP_3]])
+; CHECK-DAG: stw 3, 0([[BACKUP_4]])
+; CHECK-DAG: stw 3, 0([[BACKUP_5]])
+; CHECK-DAG: stw 3, 0([[BACKUP_6]])
+; CHECK-DAG: stw 3, 0([[BACKUP_7]])
+; CHECK-DAG: stw 3, 0([[BACKUP_8]])
+; CHECK-DAG: stw 3, 0([[BACKUP_9]])
+; CHECK-DAG: stw 3, 0([[BACKUP_10]])
+; CHECK: blr
+
+ %0 = load i32*, i32** @a, align 8
+ %cmp = icmp eq i32* %0, null
+ br i1 %cmp, label %return, label %if.end
+
+if.end: ; preds = %entry
+ store i32 0, i32* %x01, align 4
+ store i32 0, i32* %x02, align 4
+ store i32 0, i32* %x03, align 4
+ store i32 0, i32* %x04, align 4
+ store i32 0, i32* %x05, align 4
+ store i32 0, i32* %x06, align 4
+ store i32 0, i32* %x07, align 4
+ store i32 0, i32* %x08, align 4
+ br label %return
+
+return: ; preds = %entry, %if.end
+ ret void
+}
diff --git a/llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll b/llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll
new file mode 100644
index 00000000000..4a235983e6f
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/tls_get_addr_stackframe.ll
@@ -0,0 +1,32 @@
+; RUN: llc -mtriple="powerpc64le-unknown-linux-gnu" -relocation-model=pic < %s | FileCheck %s
+; CHECK-LABEL: foo_test:
+; CHECK: mflr 0
+; CHECK: __tls_get_addr
+
+%struct1.2.41 = type { %struct2.0.39, %struct3.1.40, %struct1.2.41* }
+%struct2.0.39 = type { i64, i32, i32, i32, i32 }
+%struct3.1.40 = type { [160 x i8] }
+
+@tls_var = external thread_local global %struct1.2.41*, align 8
+
+define void @foo_test() {
+ %1 = load %struct1.2.41*, %struct1.2.41** @tls_var, align 8
+ br i1 undef, label %foo.exit, label %2
+
+; <label>:2 ; preds = %0
+ br i1 undef, label %foo.exit, label %3
+
+; <label>:3 ; preds = %2
+ %4 = getelementptr inbounds %struct1.2.41, %struct1.2.41* %1, i64 0, i32 0, i32 3
+ %5 = load i32, i32* %4, align 8
+ %6 = add nsw i32 %5, -1
+ %7 = icmp eq i32 %6, 0
+ br i1 %7, label %8, label %foo.exit
+
+; <label>:8 ; preds = %3
+ tail call void undef(%struct1.2.41* undef, %struct1.2.41* nonnull undef)
+ br label %foo.exit
+
+foo.exit: ; preds = %8, %3, %2, %0
+ ret void
+}
OpenPOWER on IntegriCloud