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| author | Daniel Jasper <djasper@google.com> | 2017-01-15 09:41:49 +0000 |
|---|---|---|
| committer | Daniel Jasper <djasper@google.com> | 2017-01-15 09:41:49 +0000 |
| commit | bf56ad36cb79c1912bf8bf6725b634652d462dda (patch) | |
| tree | 355db9f7f779651237c23e4d4af5c91d8f547655 /llvm/test | |
| parent | 0952750faea70aeb600f4416203e80b516c434c9 (diff) | |
| download | bcm5719-llvm-bf56ad36cb79c1912bf8bf6725b634652d462dda.tar.gz bcm5719-llvm-bf56ad36cb79c1912bf8bf6725b634652d462dda.zip | |
Revert "[GlobalISel] track predecessor mapping during switch lowering."
This reverts commit r291973.
The test fails in a Release build with LLVM_BUILD_GLOBAL_ISEL enabled.
AFAICT, llc segfaults. I'll add a few more details to the original
commit.
llvm-svn: 292061
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll | 49 |
1 files changed, 0 insertions, 49 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll index aa5a07dad4a..15b4012f383 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll @@ -168,55 +168,6 @@ return: ret i32 %res } - ; The switch lowering code changes the CFG, which means that the original - ; %entry block is no longer a predecessor for the phi instruction. We need to - ; use the correct lowered MachineBasicBlock instead. -; CHECK-LABEL: name: test_cfg_remap - -; CHECK: bb.5.entry: -; CHECK-NEXT: successors: %[[PHI_BLOCK:bb.[0-9]+.phi.block]] -; CHECK: G_BR %[[PHI_BLOCK]] - -; CHECK: [[PHI_BLOCK]]: -; CHECK-NEXT: PHI %{{.*}}(s32), %bb.5.entry -define i32 @test_cfg_remap(i32 %in) { -entry: - switch i32 %in, label %phi.block [i32 1, label %next - i32 57, label %other] - -next: - br label %phi.block - -other: - ret i32 undef - -phi.block: - %res = phi i32 [1, %entry], [42, %next] - ret i32 %res -} - -; CHECK-LABEL: name: test_cfg_remap_multiple_preds -; CHECK: PHI [[ENTRY:%.*]](s32), %bb.{{[0-9]+}}.entry, [[ENTRY]](s32), %bb.{{[0-9]+}}.entry -define i32 @test_cfg_remap_multiple_preds(i32 %in) { -entry: - switch i32 %in, label %odd [i32 1, label %next - i32 57, label %other - i32 128, label %phi.block - i32 256, label %phi.block] -odd: - unreachable - -next: - br label %phi.block - -other: - ret i32 undef - -phi.block: - %res = phi i32 [1, %entry], [1, %entry], [42, %next] - ret i32 12 -} - ; Tests for or. ; CHECK-LABEL: name: ori64 ; CHECK: [[ARG1:%[0-9]+]](s64) = COPY %x0 |
