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authorHaicheng Wu <haicheng@codeaurora.org>2017-06-01 19:06:07 +0000
committerHaicheng Wu <haicheng@codeaurora.org>2017-06-01 19:06:07 +0000
commitbf277f38adaad07fb760002ea8fd3867c8ebecea (patch)
tree4898d0d786964230328dbbbe679267439cfa6180 /llvm/test
parentee8d6acb1f5c175c1d2c4d892149421b0fe285ed (diff)
downloadbcm5719-llvm-bf277f38adaad07fb760002ea8fd3867c8ebecea.tar.gz
bcm5719-llvm-bf277f38adaad07fb760002ea8fd3867c8ebecea.zip
[InlineCost] Add a test case for GEP cost
The added test case is to check whether the simplified value is passed to getGEPCost(). Differential Revision: https://reviews.llvm.org/D33779 llvm-svn: 304454
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/Transforms/Inline/AArch64/gep-cost.ll25
1 files changed, 23 insertions, 2 deletions
diff --git a/llvm/test/Transforms/Inline/AArch64/gep-cost.ll b/llvm/test/Transforms/Inline/AArch64/gep-cost.ll
index 204958f082d..7d191d37f1f 100644
--- a/llvm/test/Transforms/Inline/AArch64/gep-cost.ll
+++ b/llvm/test/Transforms/Inline/AArch64/gep-cost.ll
@@ -4,11 +4,21 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
-define void @outer([4 x i32]* %ptr, i32 %i) {
+define void @outer1([4 x i32]* %ptr, i32 %i) {
call void @inner1([4 x i32]* %ptr, i32 %i)
+ ret void
+}
+
+define void @outer2([4 x i32]* %ptr, i32 %i) {
call void @inner2([4 x i32]* %ptr, i32 %i)
ret void
}
+
+define void @outer3([4 x i32]* %ptr, i32 %j) {
+ call void @inner3([4 x i32]* %ptr, i32 0, i32 %j)
+ ret void
+}
+
; The gep in inner1() is reg+reg, which is a legal addressing mode for AArch64.
; Thus, both the gep and ret can be simplified.
; CHECK: Analyzing call of inner1
@@ -19,7 +29,7 @@ define void @inner1([4 x i32]* %ptr, i32 %i) {
ret void
}
-; The gep in inner2() is reg+imm+reg, which is not a legal addressing mode for
+; The gep in inner2() is reg+imm+reg, which is not a legal addressing mode for
; AArch64. Thus, only the ret can be simplified and not the gep.
; CHECK: Analyzing call of inner2
; CHECK: NumInstructionsSimplified: 1
@@ -28,3 +38,14 @@ define void @inner2([4 x i32]* %ptr, i32 %i) {
%G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 1, i32 %i
ret void
}
+
+; The gep in inner3() is reg+reg because %i is a known constant from the
+; callsite. This case is a legal addressing mode for AArch64. Thus, both the
+; gep and ret can be simplified.
+; CHECK: Analyzing call of inner3
+; CHECK: NumInstructionsSimplified: 2
+; CHECK: NumInstructions: 2
+define void @inner3([4 x i32]* %ptr, i32 %i, i32 %j) {
+ %G = getelementptr inbounds [4 x i32], [4 x i32]* %ptr, i32 %i, i32 %j
+ ret void
+}
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