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| author | Colin LeMahieu <colinl@codeaurora.org> | 2015-06-05 16:00:11 +0000 |
|---|---|---|
| committer | Colin LeMahieu <colinl@codeaurora.org> | 2015-06-05 16:00:11 +0000 |
| commit | be8c453d58a77909b1e35410a8ea6e78f5d0e50c (patch) | |
| tree | afa5713ca4843dc1fb05168df4ff5d5024881e67 /llvm/test | |
| parent | 28444b3074c38232d53e3572c52636121b30c5ff (diff) | |
| download | bcm5719-llvm-be8c453d58a77909b1e35410a8ea6e78f5d0e50c.tar.gz bcm5719-llvm-be8c453d58a77909b1e35410a8ea6e78f5d0e50c.zip | |
[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
llvm-svn: 239161
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/args.ll | 8 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/calling-conv.ll | 73 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/dualstore.ll | 15 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/duplex.ll | 7 | ||||
| -rw-r--r-- | llvm/test/CodeGen/Hexagon/sube.ll | 4 | ||||
| -rw-r--r-- | llvm/test/MC/Hexagon/inst_add.ll | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Hexagon/inst_select.ll | 9 | ||||
| -rw-r--r-- | llvm/test/MC/Hexagon/inst_sxtb.ll | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Hexagon/inst_sxth.ll | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Hexagon/inst_zxtb.ll | 6 | ||||
| -rw-r--r-- | llvm/test/MC/Hexagon/inst_zxth.ll | 6 |
11 files changed, 41 insertions, 105 deletions
diff --git a/llvm/test/CodeGen/Hexagon/args.ll b/llvm/test/CodeGen/Hexagon/args.ll index aea4ffe2eee..1c470f68aa2 100644 --- a/llvm/test/CodeGen/Hexagon/args.ll +++ b/llvm/test/CodeGen/Hexagon/args.ll @@ -1,8 +1,8 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched -disable-hexagon-misched < %s | FileCheck %s -; CHECK: memw(r29{{ *}}+{{ *}}#0){{ *}}={{ *}}#7 -; CHECK: r1:0 = combine(#2, #1) -; CHECK: r3:2 = combine(#4, #3) +; RUN: llc -march=hexagon < %s | FileCheck %s ; CHECK: r5:4 = combine(#6, #5) +; CHECK: r3:2 = combine(#4, #3) +; CHECK: r1:0 = combine(#2, #1) +; CHECK: memw(r29{{ *}}+{{ *}}#0){{ *}}={{ *}}#7 define void @foo() nounwind { diff --git a/llvm/test/CodeGen/Hexagon/calling-conv.ll b/llvm/test/CodeGen/Hexagon/calling-conv.ll deleted file mode 100644 index 7133c1ae7aa..00000000000 --- a/llvm/test/CodeGen/Hexagon/calling-conv.ll +++ /dev/null @@ -1,73 +0,0 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv5 <%s | \ -; RUN: FileCheck %s --check-prefix=CHECK-ONE -; RUN: llc -march=hexagon -mcpu=hexagonv5 <%s | \ -; RUN: FileCheck %s --check-prefix=CHECK-TWO -; RUN: llc -march=hexagon -mcpu=hexagonv5 <%s | \ -; RUN: FileCheck %s --check-prefix=CHECK-THREE - -%struct.test_struct = type { i32, i8, i64 } -%struct.test_struct_long = type { i8, i64 } - -@mystruct = external global %struct.test_struct*, align 4 - -; CHECK-ONE: memw(r29+#48) = r2 -; CHECK-TWO: memw(r29+#52) = r2 -; CHECK-THREE: memw(r29+#56) = r2 -; Function Attrs: nounwind -define void @foo(%struct.test_struct* noalias sret %agg.result, i32 %a, i8 zeroext %c, %struct.test_struct* byval %s, %struct.test_struct_long* byval %t) #0 { -entry: - %a.addr = alloca i32, align 4 - %c.addr = alloca i8, align 1 - %z = alloca i32, align 4 - %ret = alloca %struct.test_struct, align 8 - store i32 %a, i32* %a.addr, align 4 - store i8 %c, i8* %c.addr, align 1 - %0 = bitcast i32* %z to i8* - call void @llvm.lifetime.start(i64 4, i8* %0) #1 - store i32 45, i32* %z, align 4 - %1 = bitcast %struct.test_struct* %ret to i8* - call void @llvm.lifetime.start(i64 16, i8* %1) #1 - %2 = load i32, i32* %z, align 4 - %3 = load %struct.test_struct*, %struct.test_struct** @mystruct, align 4 - %4 = load %struct.test_struct*, %struct.test_struct** @mystruct, align 4 - %5 = load i8, i8* %c.addr, align 1 - %6 = load i32, i32* %a.addr, align 4 - %conv = sext i32 %6 to i64 - %add = add nsw i64 %conv, 1 - %7 = load i32, i32* %a.addr, align 4 - %add1 = add nsw i32 %7, 2 - %8 = load i32, i32* %a.addr, align 4 - %conv2 = sext i32 %8 to i64 - %add3 = add nsw i64 %conv2, 3 - %9 = load i8, i8* %c.addr, align 1 - %10 = load i8, i8* %c.addr, align 1 - %11 = load i8, i8* %c.addr, align 1 - %12 = load i32, i32* %z, align 4 - call void @bar(%struct.test_struct* sret %ret, i32 %2, %struct.test_struct* byval %3, %struct.test_struct* byval %4, i8 zeroext %5, i64 %add, i32 %add1, i64 %add3, i8 zeroext %9, i8 zeroext %10, i8 zeroext %11, i32 %12) - %x = getelementptr inbounds %struct.test_struct, %struct.test_struct* %ret, i32 0, i32 0 - store i32 20, i32* %x, align 4 - %13 = bitcast %struct.test_struct* %agg.result to i8* - %14 = bitcast %struct.test_struct* %ret to i8* - call void @llvm.memcpy.p0i8.p0i8.i32(i8* %13, i8* %14, i32 16, i32 8, i1 false) - %15 = bitcast %struct.test_struct* %ret to i8* - call void @llvm.lifetime.end(i64 16, i8* %15) #1 - %16 = bitcast i32* %z to i8* - call void @llvm.lifetime.end(i64 4, i8* %16) #1 - ret void -} - -; Function Attrs: nounwind -declare void @llvm.lifetime.start(i64, i8* nocapture) #1 - -declare void @bar(%struct.test_struct* sret, i32, %struct.test_struct* byval, %struct.test_struct* byval, i8 zeroext, i64, i32, i64, i8 zeroext, i8 zeroext, i8 zeroext, i32) #2 - -; Function Attrs: nounwind -declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i32, i1) #1 - -; Function Attrs: nounwind -declare void @llvm.lifetime.end(i64, i8* nocapture) #1 - -attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv4" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { nounwind } -attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv4" "unsafe-fp-math"="false" "use-soft-float"="false" } - diff --git a/llvm/test/CodeGen/Hexagon/dualstore.ll b/llvm/test/CodeGen/Hexagon/dualstore.ll index 33d9ce9b935..9f4569d6459 100644 --- a/llvm/test/CodeGen/Hexagon/dualstore.ll +++ b/llvm/test/CodeGen/Hexagon/dualstore.ll @@ -1,12 +1,11 @@ -; RUN: llc -march=hexagon -disable-hexagon-misched < %s | FileCheck %s +; RUN: llc -march=hexagon -filetype=obj %s -o - | llvm-objdump -d - | FileCheck %s ; Check that we generate dual stores in one packet in V4 -; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#{{[0-9]+}}){{ *}}= -; CHECK-NEXT: memw(r{{[0-9]+}}{{ *}}+{{ *}}#{{[0-9]+}}){{ *}}= +; CHECK: 00 40 9f 52 529f4000 +; CHECK: 10 10 00 f0 f0001010 -define i32 @main(i32 %v, i32* %p1, i32* %p2) nounwind { -entry: - store i32 %v, i32* %p1, align 4 - store i32 %v, i32* %p2, align 4 - ret i32 0 +define void @foo(i32* %a, i32* %b) { + store i32 0, i32* %a + store i32 0, i32* %b + ret void } diff --git a/llvm/test/CodeGen/Hexagon/duplex.ll b/llvm/test/CodeGen/Hexagon/duplex.ll new file mode 100644 index 00000000000..80fe61ceccc --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/duplex.ll @@ -0,0 +1,7 @@ +; RUN: llc -march=hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s + +; CHECK: c0 3f 00 48 48003fc0 + +define i32 @foo() { +ret i32 0 +}
\ No newline at end of file diff --git a/llvm/test/CodeGen/Hexagon/sube.ll b/llvm/test/CodeGen/Hexagon/sube.ll index 873f52b2d5d..9735894c419 100644 --- a/llvm/test/CodeGen/Hexagon/sube.ll +++ b/llvm/test/CodeGen/Hexagon/sube.ll @@ -3,10 +3,10 @@ ; CHECK: r{{[0-9]+:[0-9]+}} = #1 ; CHECK: r{{[0-9]+:[0-9]+}} = #0 ; CHECK: p{{[0-9]+}} = cmp.gtu(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}}) -; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) -; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) ; CHECK: r{{[0-9]+:[0-9]+}} = sub(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}}) ; CHECK: r{{[0-9]+:[0-9]+}} = sub(r{{[0-9]+:[0-9]+}}, r{{[0-9]+:[0-9]+}}) +; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) +; CHECK: r{{[0-9]+}} = mux(p{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}) ; CHECK: r{{[0-9]+:[0-9]+}} = combine(r{{[0-9]+}}, r{{[0-9]+}}) define void @check_sube_subc(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) { diff --git a/llvm/test/MC/Hexagon/inst_add.ll b/llvm/test/MC/Hexagon/inst_add.ll index 20a7b312ed6..826776952e0 100644 --- a/llvm/test/MC/Hexagon/inst_add.ll +++ b/llvm/test/MC/Hexagon/inst_add.ll @@ -1,5 +1,5 @@ -;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ -;; RUN: | llvm-objdump -s - | FileCheck %s +; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i32 %a, i32 %b) { @@ -7,4 +7,4 @@ define i32 @foo (i32 %a, i32 %b) ret i32 %1 } -; CHECK: 0000 004100f3 00c09f52 +; CHECK: c0 3f 10 58 58103fc0 diff --git a/llvm/test/MC/Hexagon/inst_select.ll b/llvm/test/MC/Hexagon/inst_select.ll index 29a2db0723b..9d12c1de73f 100644 --- a/llvm/test/MC/Hexagon/inst_select.ll +++ b/llvm/test/MC/Hexagon/inst_select.ll @@ -1,5 +1,5 @@ -;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ -;; RUN: | llvm-objdump -s - | FileCheck %s +; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i1 %a, i32 %b, i32 %c) { @@ -7,4 +7,7 @@ define i32 @foo (i1 %a, i32 %b, i32 %c) ret i32 %1 } -; CHECK: 0000 00400085 00600174 00608274 00c09f52 +; CHECK: 00 40 00 85 85004000 +; CHECK: 00 40 9f 52 529f4000 +; CHECK: 00 60 01 74 74016000 +; CHECK: 00 e0 82 74 7482e000
\ No newline at end of file diff --git a/llvm/test/MC/Hexagon/inst_sxtb.ll b/llvm/test/MC/Hexagon/inst_sxtb.ll index 4a217420a96..34219c72c99 100644 --- a/llvm/test/MC/Hexagon/inst_sxtb.ll +++ b/llvm/test/MC/Hexagon/inst_sxtb.ll @@ -1,5 +1,5 @@ -;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ -;; RUN: | llvm-objdump -s - | FileCheck %s +; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i8 %a) { @@ -7,4 +7,4 @@ define i32 @foo (i8 %a) ret i32 %1 } -; CHECK: 0000 0040a070 00c09f52 +; CHECK: c0 3f 00 55 55003fc0 diff --git a/llvm/test/MC/Hexagon/inst_sxth.ll b/llvm/test/MC/Hexagon/inst_sxth.ll index f0bcf584efa..5d1223da8e0 100644 --- a/llvm/test/MC/Hexagon/inst_sxth.ll +++ b/llvm/test/MC/Hexagon/inst_sxth.ll @@ -1,5 +1,5 @@ -;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ -;; RUN: | llvm-objdump -s - | FileCheck %s +; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i16 %a) { @@ -7,4 +7,4 @@ define i32 @foo (i16 %a) ret i32 %1 } -; CHECK: 0000 0040e070 00c09f52 +; CHECK: c0 3f 00 54 54003fc0
\ No newline at end of file diff --git a/llvm/test/MC/Hexagon/inst_zxtb.ll b/llvm/test/MC/Hexagon/inst_zxtb.ll index 622c03692b2..86da5e52cac 100644 --- a/llvm/test/MC/Hexagon/inst_zxtb.ll +++ b/llvm/test/MC/Hexagon/inst_zxtb.ll @@ -1,5 +1,5 @@ -;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ -;; RUN: | llvm-objdump -s - | FileCheck %s +; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i8 %a) { @@ -7,4 +7,4 @@ define i32 @foo (i8 %a) ret i32 %1 } -; CHECK: 0000 e05f0076 00c09f52 +; CHECK: c0 3f 00 57 57003fc0 diff --git a/llvm/test/MC/Hexagon/inst_zxth.ll b/llvm/test/MC/Hexagon/inst_zxth.ll index 962210b1751..7b3d1b30648 100644 --- a/llvm/test/MC/Hexagon/inst_zxth.ll +++ b/llvm/test/MC/Hexagon/inst_zxth.ll @@ -1,5 +1,5 @@ -;; RUN: llc -mtriple=hexagon-unknown-elf -filetype=obj %s -o - \ -;; RUN: | llvm-objdump -s - | FileCheck %s +; RUN: llc -march=hexagon -filetype=obj %s -o - \ +; RUN: | llvm-objdump -d - | FileCheck %s define i32 @foo (i16 %a) { @@ -7,4 +7,4 @@ define i32 @foo (i16 %a) ret i32 %1 } -; CHECK: 0000 0040c070 00c09f52 +; CHECK: c0 3f 00 56 56003fc0 |

