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| author | Sanjoy Das <sanjoy@playingwithpointers.com> | 2017-04-28 04:48:42 +0000 |
|---|---|---|
| committer | Sanjoy Das <sanjoy@playingwithpointers.com> | 2017-04-28 04:48:42 +0000 |
| commit | ba0daee6b236cfda7488c68a1f16d51b6a60d521 (patch) | |
| tree | 36413afccebf401e3196b48412a5890197229bb2 /llvm/test | |
| parent | 41d9ef3cedbe05b83e8c03c62aeaf01a1e52b134 (diff) | |
| download | bcm5719-llvm-ba0daee6b236cfda7488c68a1f16d51b6a60d521.tar.gz bcm5719-llvm-ba0daee6b236cfda7488c68a1f16d51b6a60d521.zip | |
[StackMaps] Increase the size of the "location size" field
Summary:
In some cases LLVM (especially the SLP vectorizer) will create vectors
that are 256 bytes (or larger). Given that this is intentional[0] is
likely to get more common, this patch updates the StackMap binary
format to deal with the spill locations for said vectors.
This change also bumps the stack map version from 2 to 3.
[0]: https://reviews.llvm.org/D32533#738350
Reviewers: reames, kavon, skatkov, javed.absar
Subscribers: mcrosier, nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D32629
llvm-svn: 301615
Diffstat (limited to 'llvm/test')
19 files changed, 1065 insertions, 339 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll b/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll index 1af31038324..10989a07990 100644 --- a/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll +++ b/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll @@ -4,7 +4,7 @@ ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -48,18 +48,24 @@ ; CHECK-NEXT: .short 3 ; Loc 0: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Constant 3 ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 3 define i64 @test() nounwind ssp uwtable { entry: @@ -69,18 +75,22 @@ entry: ; property access 1 - %obj is an anyreg call argument and should therefore be in a register ; CHECK-LABEL: .long L{{.*}}-_property_access1 -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 2 locations ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @property_access1(i8* %obj) nounwind ssp uwtable { entry: @@ -91,18 +101,22 @@ entry: ; property access 2 - %obj is an anyreg call argument and should therefore be in a register ; CHECK-LABEL: .long L{{.*}}-_property_access2 -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 2 locations ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @property_access2() nounwind ssp uwtable { entry: @@ -114,18 +128,22 @@ entry: ; property access 3 - %obj is a frame index ; CHECK-LABEL: .long L{{.*}}-_property_access3 -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 2 locations ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Direct FP - 8 ; CHECK-NEXT: .byte 2 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 29 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -8 define i64 @property_access3() nounwind ssp uwtable { entry: @@ -137,78 +155,106 @@ entry: ; anyreg_test1 ; CHECK-LABEL: .long L{{.*}}-_anyreg_test1 -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 14 locations ; CHECK-NEXT: .short 14 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 4: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 5: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 6: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 7: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 8: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 9: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 10: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 11: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 12: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 13: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @anyreg_test1(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { entry: @@ -219,78 +265,106 @@ entry: ; anyreg_test2 ; CHECK-LABEL: .long L{{.*}}-_anyreg_test2 -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 14 locations ; CHECK-NEXT: .short 14 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 4: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 5: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 6: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 7: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 8: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 9: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 10: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 11: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 12: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 13: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @anyreg_test2(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { entry: @@ -308,18 +382,24 @@ entry: ; CHECK-NEXT: .short 3 ; Loc 0: Register (some register that will be spilled to the stack) ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @patchpoint_spilldef(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { entry: @@ -337,28 +417,38 @@ entry: ; CHECK-NEXT: .short 5 ; Loc 0: Return a register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Arg0 in a Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Arg1 in a Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Arg2 spilled to FP -96 ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 29 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -96 ; Loc 4: Arg3 spilled to FP - 88 ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 29 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -88 define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { entry: diff --git a/llvm/test/CodeGen/AArch64/arm64-stackmap.ll b/llvm/test/CodeGen/AArch64/arm64-stackmap.ll index 0b2e9776263..e12a35a93e2 100644 --- a/llvm/test/CodeGen/AArch64/arm64-stackmap.ll +++ b/llvm/test/CodeGen/AArch64/arm64-stackmap.ll @@ -10,7 +10,7 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -67,22 +67,30 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" ; CHECK-NEXT: .short 4 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 65535 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 65536 ; SmallConstant ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; LargeConstant at index 0 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 1 @@ -99,12 +107,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @osrinline(i64 %a, i64 %b) { entry: @@ -123,12 +135,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @osrcold(i64 %a, i64 %b) { entry: @@ -163,12 +179,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @propertyWrite(i64 %dummy1, i64* %obj, i64 %dummy2, i64 %a) { entry: @@ -185,12 +205,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @jsVoidCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { entry: @@ -207,12 +231,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @jsIntCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { entry: @@ -233,8 +261,11 @@ entry: ; Check that at least one is a spilled entry from RBP. ; Location: Indirect FP + ... ; CHECK: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short ; CHECK-NEXT: .short 29 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27) { entry: call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 11, i32 20, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27) @@ -252,8 +283,11 @@ entry: ; Check that at least one is a spilled entry from RBP. ; Location: Indirect FP + ... ; CHECK: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short ; CHECK-NEXT: .short 29 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) { entry: call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 16, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) @@ -269,7 +303,9 @@ entry: ; CHECK-NEXT: .short 1 ; Loc 0: SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 33 @@ -286,8 +322,10 @@ define void @liveConstant() { ; CHECK-NEXT: .short 1 ; Loc 0: Indirect FP (r29) - offset ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 29 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -{{[0-9]+}} define void @clobberLR(i32 %a) { tail call void asm sideeffect "nop", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{x29},~{x31}"() nounwind diff --git a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll index 4b04276ac22..b66dbfae6c8 100644 --- a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll +++ b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll @@ -5,7 +5,7 @@ target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -25,6 +25,7 @@ define i64 @stackmap_liveness(i1 %c) { ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; Padding +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .short 0 ; Num LiveOut Entries: 1 ; CHECK-NEXT: .short 2 diff --git a/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll b/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll index 4af118b567b..06ec561a45d 100644 --- a/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll +++ b/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll @@ -31,7 +31,7 @@ target triple = "powerpc64-unknown-linux-gnu" ; CHECK-LABEL: .section .llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -75,18 +75,24 @@ target triple = "powerpc64-unknown-linux-gnu" ; CHECK-NEXT: .short 3 ; Loc 0: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Constant 3 ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 3 define i64 @test() nounwind ssp uwtable { entry: @@ -96,18 +102,22 @@ entry: ; property access 1 - %obj is an anyreg call argument and should therefore be in a register ; CHECK: .long .L{{.*}}-.L[[property_access1_BEGIN]] -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 2 locations ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @property_access1(i8* %obj) nounwind ssp uwtable { entry: @@ -118,18 +128,22 @@ entry: ; property access 2 - %obj is an anyreg call argument and should therefore be in a register ; CHECK: .long .L{{.*}}-.L[[property_access2_BEGIN]] -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 2 locations ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @property_access2() nounwind ssp uwtable { entry: @@ -141,18 +155,22 @@ entry: ; property access 3 - %obj is a frame index ; CHECK: .long .L{{.*}}-.L[[property_access3_BEGIN]] -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 2 locations ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Direct FP - 8 ; CHECK-NEXT: .byte 2 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 31 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 112 define i64 @property_access3() nounwind ssp uwtable { entry: @@ -164,78 +182,106 @@ entry: ; anyreg_test1 ; CHECK: .long .L{{.*}}-.L[[anyreg_test1_BEGIN]] -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 14 locations ; CHECK-NEXT: .short 14 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 4: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 5: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 6: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 7: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 8: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 9: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 10: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 11: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 12: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 13: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @anyreg_test1(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { entry: @@ -246,78 +292,106 @@ entry: ; anyreg_test2 ; CHECK: .long .L{{.*}}-.L[[anyreg_test2_BEGIN]] -; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; 14 locations ; CHECK-NEXT: .short 14 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 4: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 5: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 6: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 7: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 8: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 9: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 10: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 11: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 12: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 13: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @anyreg_test2(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { entry: @@ -335,18 +409,24 @@ entry: ; CHECK-NEXT: .short 3 ; Loc 0: Register (some register that will be spilled to the stack) ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @patchpoint_spilldef(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { entry: @@ -365,28 +445,38 @@ entry: ; CHECK-NEXT: .short 5 ; Loc 0: Return a register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Arg0 in a Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Arg1 in a Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Arg2 spilled to FP -96 ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 31 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 128 ; Loc 4: Arg3 spilled to FP - 88 ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 31 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 136 define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { entry: diff --git a/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll b/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll index 854cee22c34..5abc2a2a217 100644 --- a/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll +++ b/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll @@ -44,7 +44,7 @@ target triple = "powerpc64-unknown-linux-gnu" ; CHECK-LABEL: .section .llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -101,22 +101,30 @@ target triple = "powerpc64-unknown-linux-gnu" ; CHECK-NEXT: .short 4 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 65535 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 65536 ; SmallConstant ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; LargeConstant at index 0 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 1 @@ -133,12 +141,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @osrinline(i64 %a, i64 %b) { entry: @@ -157,12 +169,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @osrcold(i64 %a, i64 %b) { entry: @@ -197,12 +213,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @propertyWrite(i64 %dummy1, i64* %obj, i64 %dummy2, i64 %a) { entry: @@ -219,12 +239,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @jsVoidCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { entry: @@ -241,12 +265,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @jsIntCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { entry: @@ -267,8 +295,11 @@ entry: ; Check that at least one is a spilled entry from r31. ; Location: Indirect FP + ... ; CHECK: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short ; CHECK-NEXT: .short 31 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27) { entry: call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 11, i32 40, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27) @@ -286,8 +317,11 @@ entry: ; Check that at least one is a spilled entry from r31. ; Location: Indirect FP + ... ; CHECK: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short ; CHECK-NEXT: .short 31 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) { entry: call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 16, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16, i64 %l17, i64 %l18, i64 %l19, i64 %l20, i64 %l21, i64 %l22, i64 %l23, i64 %l24, i64 %l25, i64 %l26, i64 %l27, i64 %l28, i64 %l29) @@ -303,7 +337,9 @@ entry: ; CHECK-NEXT: .short 1 ; Loc 0: SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 33 @@ -320,8 +356,10 @@ define void @liveConstant() { ; CHECK-NEXT: .short 1 ; Loc 0: Indirect FP (r31) - offset ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 31 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long {{[0-9]+}} define void @clobberLR(i32 %a) { tail call void asm sideeffect "nop", "~{r0},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30},~{r31}"() nounwind diff --git a/llvm/test/CodeGen/X86/anyregcc.ll b/llvm/test/CodeGen/X86/anyregcc.ll index 1b51b53bd22..b75774ab12c 100644 --- a/llvm/test/CodeGen/X86/anyregcc.ll +++ b/llvm/test/CodeGen/X86/anyregcc.ll @@ -7,7 +7,7 @@ ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -53,18 +53,24 @@ ; CHECK-NEXT: .short 3 ; Loc 0: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Constant 3 ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 3 define i64 @test() nounwind ssp uwtable { entry: @@ -79,13 +85,17 @@ entry: ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @property_access1(i8* %obj) nounwind ssp uwtable { entry: @@ -101,13 +111,17 @@ entry: ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @property_access2() nounwind ssp uwtable { entry: @@ -124,13 +138,17 @@ entry: ; CHECK-NEXT: .short 2 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Direct RBP - ofs ; CHECK-NEXT: .byte 2 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long define i64 @property_access3() nounwind ssp uwtable { entry: @@ -147,73 +165,101 @@ entry: ; CHECK-NEXT: .short 14 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 4: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 5: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 6: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 7: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 8: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 9: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 10: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 11: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 12: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 13: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @anyreg_test1(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { entry: @@ -229,73 +275,101 @@ entry: ; CHECK-NEXT: .short 14 ; Loc 0: Register <-- this is the return register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 4: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 5: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 6: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 7: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 8: Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 9: Argument, still on stack ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long ; Loc 10: Argument, still on stack ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long ; Loc 11: Argument, still on stack ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long ; Loc 12: Argument, still on stack ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long ; Loc 13: Argument, still on stack ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long define i64 @anyreg_test2(i8* %a1, i8* %a2, i8* %a3, i8* %a4, i8* %a5, i8* %a6, i8* %a7, i8* %a8, i8* %a9, i8* %a10, i8* %a11, i8* %a12, i8* %a13) nounwind ssp uwtable { entry: @@ -313,18 +387,24 @@ entry: ; CHECK-NEXT: .short 3 ; Loc 0: Register (some register that will be spilled to the stack) ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register RDI ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 5 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Register RSI ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 4 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @patchpoint_spilldef(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { entry: @@ -342,28 +422,38 @@ entry: ; CHECK-NEXT: .short 5 ; Loc 0: Return a register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 1: Arg0 in a Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 2: Arg1 in a Register ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; Loc 3: Arg2 spilled to RBP + ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long ; Loc 4: Arg3 spilled to RBP + ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long define i64 @patchpoint_spillargs(i64 %p1, i64 %p2, i64 %p3, i64 %p4) { entry: diff --git a/llvm/test/CodeGen/X86/deopt-bundles.ll b/llvm/test/CodeGen/X86/deopt-bundles.ll index 615007e1fae..9745330c9ac 100644 --- a/llvm/test/CodeGen/X86/deopt-bundles.ll +++ b/llvm/test/CodeGen/X86/deopt-bundles.ll @@ -9,45 +9,45 @@ target triple = "x86_64-apple-macosx10.11.0" ; STACKMAPS: Stack Maps: callsite 2882400015 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers ; STACKMAPS-NEXT: Stack Maps: callsite 4242 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers ; STACKMAPS-NEXT: Stack Maps: callsite 4243 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 16 [encoding: .byte 4, .byte 8, .short 0, .int 16] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 16 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 16] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers ; STACKMAPS-NEXT: Stack Maps: callsite 2882400015 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 2 [encoding: .byte 4, .byte 8, .short 0, .int 2] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 2 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 2] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers ; STACKMAPS-NEXT: Stack Maps: callsite 2882400015 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 3 [encoding: .byte 4, .byte 8, .short 0, .int 3] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 3 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 3] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers ; STACKMAPS-NEXT: Stack Maps: callsite 4243 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 55 [encoding: .byte 4, .byte 8, .short 0, .int 55] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 55 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 55] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers declare i32 @callee_0() @@ -189,10 +189,10 @@ define void @vector_deopt_bundle(<32 x i64 addrspace(1)*> %val) { ret void ; STACKMAPS: Stack Maps: callsite 2882400015 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Indirect 7+0 [encoding: .byte 3, .byte 256, .short 7, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Indirect 7+0 [encoding: .byte 3, .byte 0, .short 256, .short 7, .short 0, .int 0] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers } diff --git a/llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll b/llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll index c382d66cee6..97bca1f69db 100644 --- a/llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll +++ b/llvm/test/CodeGen/X86/deopt-intrinsic-cconv.ll @@ -27,8 +27,8 @@ entry: ; STACKMAPS: Stack Maps: callsites: ; STACKMAPS-NEXT: Stack Maps: callsite 2882400015 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 12 [encoding: .byte 4, .byte 8, .short 0, .int 12] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 3 [encoding: .byte 4, .byte 8, .short 0, .int 3] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 12 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 12] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 3 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 3] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers diff --git a/llvm/test/CodeGen/X86/deopt-intrinsic.ll b/llvm/test/CodeGen/X86/deopt-intrinsic.ll index 1254e116029..0e894516ffa 100644 --- a/llvm/test/CodeGen/X86/deopt-intrinsic.ll +++ b/llvm/test/CodeGen/X86/deopt-intrinsic.ll @@ -42,15 +42,15 @@ entry: ; STACKMAPS: Stack Maps: callsites: ; STACKMAPS-NEXT: Stack Maps: callsite 2882400015 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers ; STACKMAPS-NEXT: Stack Maps: callsite 2882400015 ; STACKMAPS-NEXT: Stack Maps: has 4 locations -; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 8, .short 0, .int 0] -; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] -; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 1 [encoding: .byte 4, .byte 8, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 0: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 1: Constant 0 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 0] +; STACKMAPS-NEXT: Stack Maps: Loc 2: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] +; STACKMAPS-NEXT: Stack Maps: Loc 3: Constant 1 [encoding: .byte 4, .byte 0, .short 8, .short 0, .short 0, .int 1] ; STACKMAPS-NEXT: Stack Maps: has 0 live-out registers diff --git a/llvm/test/CodeGen/X86/patchpoint-invoke.ll b/llvm/test/CodeGen/X86/patchpoint-invoke.ll index c6dff3b78f1..9270bf2b06b 100644 --- a/llvm/test/CodeGen/X86/patchpoint-invoke.ll +++ b/llvm/test/CodeGen/X86/patchpoint-invoke.ll @@ -45,7 +45,7 @@ threw: ; Verify that the stackmap section got emitted: ; CHECK-LABEL: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions diff --git a/llvm/test/CodeGen/X86/stackmap-fast-isel.ll b/llvm/test/CodeGen/X86/stackmap-fast-isel.ll index 7afe966b77a..ae10a37756b 100644 --- a/llvm/test/CodeGen/X86/stackmap-fast-isel.ll +++ b/llvm/test/CodeGen/X86/stackmap-fast-isel.ll @@ -4,7 +4,7 @@ ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -42,62 +42,86 @@ ; CHECK-NEXT: .short 12 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 65536 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 2000000000 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 2147483647 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; LargeConstant at index 0 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; LargeConstant at index 1 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 1 ; LargeConstant at index 2 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 2 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 @@ -115,7 +139,9 @@ entry: ; CHECK-NEXT: .short 1 ; Loc 0: SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 33 @@ -133,8 +159,10 @@ define void @liveConstant() { ; CHECK-NEXT: .short 1 ; Loc 0: Direct RBP - ofs ; CHECK-NEXT: .byte 2 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long define void @directFrameIdx() { diff --git a/llvm/test/CodeGen/X86/stackmap-large-constants.ll b/llvm/test/CodeGen/X86/stackmap-large-constants.ll index 99a2c11828e..7de430b5393 100644 --- a/llvm/test/CodeGen/X86/stackmap-large-constants.ll +++ b/llvm/test/CodeGen/X86/stackmap-large-constants.ll @@ -3,7 +3,7 @@ ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; version -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; reserved ; CHECK-NEXT: .byte 0 ; reserved @@ -38,12 +38,17 @@ ; ConstantIndex ; CHECK-NEXT: .byte 5 ; reserved -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; size +; CHECK-NEXT: .short 8 ; Dwarf RegNum ; CHECK-NEXT: .short 0 +; reserved +; CHECK-NEXT: .short 0 ; Offset ; CHECK-NEXT: .long 0 ; padding +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .short 0 ; NumLiveOuts ; CHECK-NEXT: .short 0 @@ -68,12 +73,17 @@ define void @foo() { ; ConstantIndex ; CHECK-NEXT: .byte 5 ; reserved -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; size +; CHECK-NEXT: .short 8 ; Dwarf RegNum ; CHECK-NEXT: .short 0 +; reserved +; CHECK-NEXT: .short 0 ; Offset ; CHECK-NEXT: .long 1 ; padding +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .short 0 ; NumLiveOuts ; CHECK-NEXT: .short 0 diff --git a/llvm/test/CodeGen/X86/stackmap-large-location-size.ll b/llvm/test/CodeGen/X86/stackmap-large-location-size.ll new file mode 100644 index 00000000000..6c90ddaedcc --- /dev/null +++ b/llvm/test/CodeGen/X86/stackmap-large-location-size.ll @@ -0,0 +1,172 @@ +; RUN: llc < %s -mtriple="x86_64-pc-linux-gnu" | FileCheck %s + +declare void @callee() + +define void @f_0(<1024 x i64> %val) { +; CHECK: .quad 2882400015 +; CHECK-NEXT: .long .Ltmp0-f_0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 4 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(1) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 1 +; Indirect +; CHECK-NEXT: .byte 3 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8192 +; CHECK-NEXT: .short 7 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Padding +; CHECK-NEXT: .p2align 3 + call void @callee() [ "deopt"(<1024 x i64> %val) ] + ret void +} + +define void @f_1(<1024 x i8*> %val) { +; CHECK: .quad 2882400015 +; CHECK-NEXT: .long .Ltmp1-f_1 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 4 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(1) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 1 +; Indirect +; CHECK-NEXT: .byte 3 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8192 +; CHECK-NEXT: .short 7 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Padding +; CHECK-NEXT: .p2align 3 + call void @callee() [ "deopt"(<1024 x i8*> %val) ] + ret void +} + +define void @f_2(<99 x i8*> %val) { +; CHECK: .quad 2882400015 +; CHECK-NEXT: .long .Ltmp2-f_2 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 4 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(1) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 1 +; Indirect +; CHECK-NEXT: .byte 3 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 792 +; CHECK-NEXT: .short 7 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; CHECK-NEXT: .p2align 3 + call void @callee() [ "deopt"(<99 x i8*> %val) ] + ret void +} + + +define <400 x i8 addrspace(1)*> @f_3(<400 x i8 addrspace(1)*> %obj) gc "statepoint-example" { +; CHECK: .quad 4242 +; CHECK-NEXT: .long .Ltmp3-f_3 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 5 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Constant(0) +; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Indirect +; CHECK-NEXT: .byte 3 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 3200 +; CHECK-NEXT: .short 7 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Indirect +; CHECK-NEXT: .byte 3 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 3200 +; CHECK-NEXT: .short 7 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long 0 +; Padding +; CHECK-NEXT: .p2align 3 + %tok = call token (i64, i32, void ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_isVoidf(i64 4242, i32 0, void ()* @do_safepoint, i32 0, i32 0, i32 0, i32 0, <400 x i8 addrspace(1)*> %obj) + %obj.r = call coldcc <400 x i8 addrspace(1)*> @llvm.experimental.gc.relocate.v400p1i8(token %tok, i32 7, i32 7) + ret <400 x i8 addrspace(1)*> %obj.r +} + +declare void @do_safepoint() + +declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...) +declare <400 x i8 addrspace(1)*> @llvm.experimental.gc.relocate.v400p1i8(token, i32, i32) diff --git a/llvm/test/CodeGen/X86/stackmap-liveness.ll b/llvm/test/CodeGen/X86/stackmap-liveness.ll index a5809ace795..eb95b9c8df4 100644 --- a/llvm/test/CodeGen/X86/stackmap-liveness.ll +++ b/llvm/test/CodeGen/X86/stackmap-liveness.ll @@ -6,7 +6,7 @@ ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -32,6 +32,7 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; Padding +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .short 0 ; Num LiveOut Entries: 0 ; CHECK-NEXT: .short 0 @@ -43,6 +44,7 @@ entry: ; PATCH-NEXT: .short 0 ; PATCH-NEXT: .short 0 ; Padding +; PATCH-NEXT: .p2align 3 ; PATCH-NEXT: .short 0 ; Num LiveOut Entries: 1 ; PATCH-NEXT: .short 1 @@ -63,6 +65,7 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; Padding +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .short 0 ; Num LiveOut Entries: 0 ; CHECK-NEXT: .short 0 @@ -74,6 +77,7 @@ entry: ; PATCH-NEXT: .short 0 ; PATCH-NEXT: .short 0 ; Padding +; PATCH-NEXT: .p2align 3 ; PATCH-NEXT: .short 0 ; Num LiveOut Entries: 5 ; PATCH-NEXT: .short 5 @@ -107,6 +111,7 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; Padding +; CHECK-NEXT: .p2align 3 ; CHECK-NEXT: .short 0 ; Num LiveOut Entries: 0 ; CHECK-NEXT: .short 0 @@ -118,6 +123,7 @@ entry: ; PATCH-NEXT: .short 0 ; PATCH-NEXT: .short 0 ; Padding +; PATCH-NEXT: .p2align 3 ; PATCH-NEXT: .short 0 ; Num LiveOut Entries: 2 ; PATCH-NEXT: .short 2 @@ -144,6 +150,7 @@ entry: ; PATCH-NEXT: .short 0 ; PATCH-NEXT: .short 0 ; Padding +; PATCH-NEXT: .p2align 3 ; PATCH-NEXT: .short 0 ; Num LiveOut Entries: 0 ; PATCH-NEXT: .short 0 @@ -155,6 +162,7 @@ entry: ; PATCH-NEXT: .short 0 ; PATCH-NEXT: .short 0 ; Padding +; PATCH-NEXT: .p2align 3 ; PATCH-NEXT: .short 0 ; Num LiveOut Entries: 2 ; PATCH-NEXT: .short 2 diff --git a/llvm/test/CodeGen/X86/stackmap.ll b/llvm/test/CodeGen/X86/stackmap.ll index 9818d3547fc..601100bd570 100644 --- a/llvm/test/CodeGen/X86/stackmap.ll +++ b/llvm/test/CodeGen/X86/stackmap.ll @@ -5,7 +5,7 @@ ; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -79,62 +79,86 @@ ; CHECK-NEXT: .short 12 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 65536 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 2000000000 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 2147483647 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; LargeConstant at index 0 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; LargeConstant at index 1 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 1 ; LargeConstant at index 2 ; CHECK-NEXT: .byte 5 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 2 ; SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -1 @@ -151,12 +175,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @osrinline(i64 %a, i64 %b) { entry: @@ -175,12 +203,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @osrcold(i64 %a, i64 %b) { entry: @@ -200,12 +232,16 @@ ret: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @propertyRead(i64* %obj) { entry: @@ -220,12 +256,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @propertyWrite(i64 %dummy1, i64* %obj, i64 %dummy2, i64 %a) { entry: @@ -242,12 +282,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @jsVoidCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { entry: @@ -264,12 +308,16 @@ entry: ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 2 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short {{[0-9]+}} +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define i64 @jsIntCall(i64 %dummy1, i64* %obj, i64 %arg, i64 %l1, i64 %l2) { entry: @@ -290,8 +338,11 @@ entry: ; Check that at least one is a spilled entry from RBP. ; Location: Indirect RBP + ... ; CHECK: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long define void @spilledValue(i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) { entry: call void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 11, i32 15, i8* null, i32 5, i64 %arg0, i64 %arg1, i64 %arg2, i64 %arg3, i64 %arg4, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) @@ -309,8 +360,11 @@ entry: ; Check that at least one is a spilled entry from RBP. ; Location: Indirect RBP + ... ; CHECK: .byte 3 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long define webkit_jscc void @spilledStackMapValue(i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) { entry: call void (i64, i32, ...) @llvm.experimental.stackmap(i64 12, i32 15, i64 %l0, i64 %l1, i64 %l2, i64 %l3, i64 %l4, i64 %l5, i64 %l6, i64 %l7, i64 %l8, i64 %l9, i64 %l10, i64 %l11, i64 %l12, i64 %l13, i64 %l14, i64 %l15, i64 %l16) @@ -327,8 +381,11 @@ entry: ; Check that the subregister operand is a 4-byte spill. ; Location: Indirect, 4-byte, RBP + ... ; CHECK: .byte 3 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 +; CHECK-NEXT: .long define void @spillSubReg(i64 %arg) #0 { bb: br i1 undef, label %bb1, label %bb2 @@ -367,14 +424,18 @@ bb61: ; Check that the subregister operands are 1-byte spills. ; Location 0: Register, 4-byte, AL ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 1 ; CHECK-NEXT: .short 0 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; ; Location 1: Register, 4-byte, BL ; CHECK-NEXT: .byte 1 -; CHECK-NEXT: .byte 1 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 1 ; CHECK-NEXT: .short 3 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 define void @subRegOffset(i16 %arg) { %v = mul i16 %arg, 5 @@ -395,7 +456,9 @@ define void @subRegOffset(i16 %arg) { ; CHECK-NEXT: .short 1 ; Loc 0: SmallConstant ; CHECK-NEXT: .byte 4 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 33 @@ -413,8 +476,10 @@ define void @liveConstant() { ; CHECK-NEXT: .short 1 ; Loc 0: Direct RBP - ofs ; CHECK-NEXT: .byte 2 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long ; Callsite 17 @@ -424,13 +489,17 @@ define void @liveConstant() { ; CHECK-NEXT: .short 2 ; Loc 0: Direct RBP - ofs ; CHECK-NEXT: .byte 2 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long ; Loc 1: Direct RBP - ofs ; CHECK-NEXT: .byte 2 -; CHECK-NEXT: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 8 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long define void @directFrameIdx() { entry: @@ -473,8 +542,10 @@ entry: ; CHECK-NEXT: .short 1 ; Loc 0: Indirect fp - offset ; CHECK-NEXT: .byte 3 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long -{{[0-9]+}} define void @clobberScratch(i32 %a) { tail call void asm sideeffect "nop", "~{ax},~{bx},~{cx},~{dx},~{bp},~{si},~{di},~{r8},~{r9},~{r10},~{r12},~{r13},~{r14},~{r15}"() nounwind diff --git a/llvm/test/CodeGen/X86/statepoint-allocas.ll b/llvm/test/CodeGen/X86/statepoint-allocas.ll index 95ce8f37617..9f5418432ab 100644 --- a/llvm/test/CodeGen/X86/statepoint-allocas.ll +++ b/llvm/test/CodeGen/X86/statepoint-allocas.ll @@ -48,7 +48,7 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3 ; CHECK-LABEL: .section .llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -77,23 +77,31 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3 ; CHECK: .short 4 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 +; CHECK: .short 0 ; CHECK: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 +; CHECK: .short 0 ; CHECK: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 +; CHECK: .short 0 ; CHECK: .short 0 ; CHECK: .long 0 ; Direct Spill Slot [RSP+0] ; CHECK: .byte 2 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 0 ; No Padding or LiveOuts ; CHECK: .short 0 @@ -106,23 +114,31 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3 ; CHECK: .short 4 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 +; CHECK: .short 0 ; CHECK: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 +; CHECK: .short 0 ; CHECK: .short 0 ; CHECK: .long 0 ; SmallConstant (1) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 +; CHECK: .short 0 ; CHECK: .short 0 ; CHECK: .long 1 ; Direct Spill Slot [RSP+0] ; CHECK: .byte 2 -; CHECK: .byte 8 +; CHECK: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 0 ; No Padding or LiveOuts diff --git a/llvm/test/CodeGen/X86/statepoint-live-in.ll b/llvm/test/CodeGen/X86/statepoint-live-in.ll index b236393e9f4..abe2b0a7acc 100644 --- a/llvm/test/CodeGen/X86/statepoint-live-in.ll +++ b/llvm/test/CodeGen/X86/statepoint-live-in.ll @@ -89,27 +89,37 @@ entry: ; CHECK: Ltmp0-_test1 ; CHECK: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 5 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK: Ltmp1-_test2 ; CHECK: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 3 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK: Ltmp2-_test2 ; CHECK: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 3 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 ; CHECK: .byte 1 -; CHECK-NEXT: .byte 4 +; CHECK-NEXT: .byte 0 +; CHECK-NEXT: .short 4 ; CHECK-NEXT: .short 6 +; CHECK-NEXT: .short 0 ; CHECK-NEXT: .long 0 declare token @llvm.experimental.gc.statepoint.p0f_isVoidf(i64, i32, void ()*, i32, i32, ...) diff --git a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll index df6180de17a..0506381b9ec 100644 --- a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll +++ b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll @@ -79,7 +79,7 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32) ; CHECK-LABEL: .section .llvm_stackmaps ; CHECK-NEXT: __LLVM_StackMaps: ; Header -; CHECK-NEXT: .byte 2 +; CHECK-NEXT: .byte 3 ; CHECK-NEXT: .byte 0 ; CHECK-NEXT: .short 0 ; Num Functions @@ -114,58 +114,80 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32) ; CHECK: .short 11 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; SmallConstant (2) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 2 ; Indirect Spill Slot [RSP+0] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; Indirect Spill Slot [RSP+16] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; Indirect Spill Slot [RSP+8] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 8 ; Indirect Spill Slot [RSP+16] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; Indirect Spill Slot [RSP+16] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; No Padding or LiveOuts @@ -186,53 +208,73 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32) ; CHECK: .short 11 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; SmallConstant (2) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 2 ; Indirect Spill Slot [RSP+0] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; SmallConstant (0) ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; Indirect Spill Slot [RSP+16] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; Indirect Spill Slot [RSP+8] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 8 ; Indirect Spill Slot [RSP+16] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; Indirect Spill Slot [RSP+16] ; CHECK: .byte 3 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 7 +; CHECK-NEXT: .short 0 ; CHECK: .long 16 ; No Padding or LiveOuts @@ -257,22 +299,28 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32) ; StkMapRecord[0]: ; SmallConstant(0): ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; StkMapRecord[1]: ; SmallConstant(0): ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; StkMapRecord[2]: ; SmallConstant(0): ; CHECK: .byte 4 -; CHECK: .byte 8 +; CHECK-NEXT: .byte 0 +; CHECK: .short 8 ; CHECK: .short 0 +; CHECK-NEXT: .short 0 ; CHECK: .long 0 ; No padding or LiveOuts diff --git a/llvm/test/CodeGen/X86/statepoint-vector.ll b/llvm/test/CodeGen/X86/statepoint-vector.ll index 15fb25777ed..000e8874288 100644 --- a/llvm/test/CodeGen/X86/statepoint-vector.ll +++ b/llvm/test/CodeGen/X86/statepoint-vector.ll @@ -108,51 +108,67 @@ entry: ; CHECK: .Ltmp0-test ; Check for the two spill slots -; Stack Maps: Loc 3: Indirect 7+0 [encoding: .byte 3, .byte 16, .short 7, .int 0] -; Stack Maps: Loc 4: Indirect 7+0 [encoding: .byte 3, .byte 16, .short 7, .int 0] +; Stack Maps: Loc 3: Indirect 7+0 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 0] +; Stack Maps: Loc 4: Indirect 7+0 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 0] ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 0 ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 0 ; CHECK: .Ltmp1-test2 ; Check for the two spill slots -; Stack Maps: Loc 3: Indirect 7+16 [encoding: .byte 3, .byte 16, .short 7, .int 16] -; Stack Maps: Loc 4: Indirect 7+0 [encoding: .byte 3, .byte 16, .short 7, .int 0] +; Stack Maps: Loc 3: Indirect 7+16 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 16] +; Stack Maps: Loc 4: Indirect 7+0 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 0] ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 16 ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 0 ; CHECK: .Ltmp2-test3 ; Check for the four spill slots -; Stack Maps: Loc 3: Indirect 7+16 [encoding: .byte 3, .byte 16, .short 7, .int 16] -; Stack Maps: Loc 4: Indirect 7+16 [encoding: .byte 3, .byte 16, .short 7, .int 16] -; Stack Maps: Loc 5: Indirect 7+16 [encoding: .byte 3, .byte 16, .short 7, .int 16] -; Stack Maps: Loc 6: Indirect 7+0 [encoding: .byte 3, .byte 16, .short 7, .int 0] +; Stack Maps: Loc 3: Indirect 7+16 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 16] +; Stack Maps: Loc 4: Indirect 7+16 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 16] +; Stack Maps: Loc 5: Indirect 7+16 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 16] +; Stack Maps: Loc 6: Indirect 7+0 [encoding: .byte 3, .byte 0, .short 16, .short 7, .short 0, .int 0] ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 16 ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 16 ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 16 ; CHECK: .byte 3 -; CHECK: .byte 16 +; CHECK: .byte 0 +; CHECK: .short 16 ; CHECK: .short 7 +; CHECK: .short 0 ; CHECK: .long 0 declare void @do_safepoint() |
