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| author | Tim Northover <tnorthover@apple.com> | 2017-02-13 22:14:08 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2017-02-13 22:14:08 +0000 |
| commit | b73e309071e9289d4069fc059fae6a7131def805 (patch) | |
| tree | 05f9b5ada4537d9693bbb0ca5a2f3790933c4b7f /llvm/test | |
| parent | 6d325cb5cb2c9d3c9780926ea87da992b09de583 (diff) | |
| download | bcm5719-llvm-b73e309071e9289d4069fc059fae6a7131def805.tar.gz bcm5719-llvm-b73e309071e9289d4069fc059fae6a7131def805.zip | |
MIR: parse & print the atomic parts of a MachineMemOperand.
We're going to need them very soon for GlobalISel.
llvm-svn: 294992
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir | 30 | ||||
| -rw-r--r-- | llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir | 2 |
2 files changed, 31 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir b/llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir new file mode 100644 index 00000000000..1fe42a73148 --- /dev/null +++ b/llvm/test/CodeGen/MIR/AArch64/atomic-memoperands.mir @@ -0,0 +1,30 @@ +# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s + +--- | + + define void @atomic_memoperands() { + ret void + } + +... +--- +# CHECK-LABEL: name: atomic_memoperands +# CHECK: %1(s64) = G_LOAD %0(p0) :: (load unordered 8) +# CHECK: %2(s32) = G_LOAD %0(p0) :: (load monotonic 4) +# CHECK: %3(s16) = G_LOAD %0(p0) :: (load acquire 2) +# CHECK: G_STORE %3(s16), %0(p0) :: (store release 2) +# CHECK: G_STORE %2(s32), %0(p0) :: (store acq_rel 4) +# CHECK: G_STORE %1(s64), %0(p0) :: (store singlethread seq_cst 8) +name: atomic_memoperands +body: | + bb.0: + + %0:_(p0) = COPY %x0 + %1:_(s64) = G_LOAD %0(p0) :: (load unordered 8) + %2:_(s32) = G_LOAD %0(p0) :: (load monotonic 4) + %3:_(s16) = G_LOAD %0(p0) :: (load acquire 2) + G_STORE %3(s16), %0(p0) :: (store release 2) + G_STORE %2(s32), %0(p0) :: (store acq_rel 4) + G_STORE %1(s64), %0(p0) :: (store singlethread seq_cst 8) + RET_ReallyLR +... diff --git a/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir b/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir index cfa03247e31..57e11d39723 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir @@ -17,7 +17,7 @@ liveins: body: | bb.0.entry: liveins: %rdi - ; CHECK: [[@LINE+1]]:53: expected the size integer literal after memory operation + ; CHECK: [[@LINE+1]]:53: expected an atomic scope, ordering or a size integer literal %eax = MOV32rm killed %rdi, 1, _, 0, _ :: (load from %ir.a) RETQ %eax ... |
