AVX512: Implemented encoding and intrinsics for vpternlogd/q.

Differential Revision: http://reviews.llvm.org/D13768

llvm-svn: 250396

4 files changed, 577 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-intrinsics.ll
index 67b7a405acc..9a0900414f8 100644
--- a/llvm/test/CodeGen/X86/avx512-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512-intrinsics.ll
@@ -4541,3 +4541,74 @@ define <4 x float>@test_int_x86_avx512_mask_cvt_sd2ss_round(<2 x double> %x0,<2
   %res2 = fadd <4 x float> %res, %res1
   ret <4 x float> %res2
 }
+
+declare <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32, i16)
+
+define <16 x i32>@test_int_x86_avx512_mask_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_pternlog_d_512:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    kmovw %edi, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogd $33, %zmm2, %zmm1, %zmm3 {%k1}
+; CHECK-NEXT:    vpternlogd $33, %zmm2, %zmm1, %zmm0
+; CHECK-NEXT:    vpaddd %zmm0, %zmm3, %zmm0
+; CHECK-NEXT:    retq
+  %res = call <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 %x4)
+  %res1 = call <16 x i32> @llvm.x86.avx512.mask.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 -1)
+  %res2 = add <16 x i32> %res, %res1
+  ret <16 x i32> %res2
+}
+
+declare <16 x i32> @llvm.x86.avx512.maskz.pternlog.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i32, i16)
+
+define <16 x i32>@test_int_x86_avx512_maskz_pternlog_d_512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i16 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_maskz_pternlog_d_512:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    kmovw %edi, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogd $33, %zmm2, %zmm1, %zmm3 {%k1} {z}
+; CHECK-NEXT:    vpternlogd $33, %zmm2, %zmm1, %zmm0
+; CHECK-NEXT:    vpaddd %zmm0, %zmm3, %zmm0
+; CHECK-NEXT:    retq
+  %res = call <16 x i32> @llvm.x86.avx512.maskz.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 %x4)
+  %res1 = call <16 x i32> @llvm.x86.avx512.maskz.pternlog.d.512(<16 x i32> %x0, <16 x i32> %x1, <16 x i32> %x2, i32 33, i16 -1)
+  %res2 = add <16 x i32> %res, %res1
+  ret <16 x i32> %res2
+}
+
+declare <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32, i8)
+
+define <8 x i64>@test_int_x86_avx512_mask_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_pternlog_q_512:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogq $33, %zmm2, %zmm1, %zmm3 {%k1}
+; CHECK-NEXT:    vpternlogq $33, %zmm2, %zmm1, %zmm0
+; CHECK-NEXT:    vpaddq %zmm0, %zmm3, %zmm0
+; CHECK-NEXT:    retq
+  %res = call <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 %x4)
+  %res1 = call <8 x i64> @llvm.x86.avx512.mask.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 -1)
+  %res2 = add <8 x i64> %res, %res1
+  ret <8 x i64> %res2
+}
+
+declare <8 x i64> @llvm.x86.avx512.maskz.pternlog.q.512(<8 x i64>, <8 x i64>, <8 x i64>, i32, i8)
+
+define <8 x i64>@test_int_x86_avx512_maskz_pternlog_q_512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_maskz_pternlog_q_512:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogq $33, %zmm2, %zmm1, %zmm3 {%k1} {z}
+; CHECK-NEXT:    vpternlogq $33, %zmm2, %zmm1, %zmm0
+; CHECK-NEXT:    vpaddq %zmm0, %zmm3, %zmm0
+; CHECK-NEXT:    retq
+  %res = call <8 x i64> @llvm.x86.avx512.maskz.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 %x4)
+  %res1 = call <8 x i64> @llvm.x86.avx512.maskz.pternlog.q.512(<8 x i64> %x0, <8 x i64> %x1, <8 x i64> %x2, i32 33, i8 -1)
+  %res2 = add <8 x i64> %res, %res1
+  ret <8 x i64> %res2
+}
+
diff --git a/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
index b89ccf29e92..9d93bd9e3bf 100644
--- a/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
@@ -5022,3 +5022,147 @@ define <8 x i32>@test_int_x86_avx512_mask_inserti32x4_256(<8 x i32> %x0, <4 x i3
   %res4 = add <8 x i32> %res2, %res3
   ret <8 x i32> %res4
 }
+
+declare <4 x i32> @llvm.x86.avx512.mask.pternlog.d.128(<4 x i32>, <4 x i32>, <4 x i32>, i32, i8)
+
+define <4 x i32>@test_int_x86_avx512_mask_pternlog_d_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_pternlog_d_128:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogd $33, %xmm2, %xmm1, %xmm3 {%k1}
+; CHECK-NEXT:    vpternlogd $33, %xmm2, %xmm1, %xmm0
+; CHECK-NEXT:    vpaddd %xmm0, %xmm3, %xmm0
+; CHECK-NEXT:    retq
+  %res = call <4 x i32> @llvm.x86.avx512.mask.pternlog.d.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i32 33, i8 %x4)
+  %res1 = call <4 x i32> @llvm.x86.avx512.mask.pternlog.d.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i32 33, i8 -1)
+  %res2 = add <4 x i32> %res, %res1
+  ret <4 x i32> %res2
+}
+
+declare <4 x i32> @llvm.x86.avx512.maskz.pternlog.d.128(<4 x i32>, <4 x i32>, <4 x i32>, i32, i8)
+
+define <4 x i32>@test_int_x86_avx512_maskz_pternlog_d_128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_maskz_pternlog_d_128:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogd $33, %xmm2, %xmm1, %xmm3 {%k1} {z}
+; CHECK-NEXT:    vpternlogd $33, %xmm2, %xmm1, %xmm0
+; CHECK-NEXT:    vpaddd %xmm0, %xmm3, %xmm0
+; CHECK-NEXT:    retq
+  %res = call <4 x i32> @llvm.x86.avx512.maskz.pternlog.d.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i32 33, i8 %x4)
+  %res1 = call <4 x i32> @llvm.x86.avx512.maskz.pternlog.d.128(<4 x i32> %x0, <4 x i32> %x1, <4 x i32> %x2, i32 33, i8 -1)
+  %res2 = add <4 x i32> %res, %res1
+  ret <4 x i32> %res2
+}
+
+declare <8 x i32> @llvm.x86.avx512.mask.pternlog.d.256(<8 x i32>, <8 x i32>, <8 x i32>, i32, i8)
+
+define <8 x i32>@test_int_x86_avx512_mask_pternlog_d_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_pternlog_d_256:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogd $33, %ymm2, %ymm1, %ymm3 {%k1}
+; CHECK-NEXT:    vpternlogd $33, %ymm2, %ymm1, %ymm0
+; CHECK-NEXT:    vpaddd %ymm0, %ymm3, %ymm0
+; CHECK-NEXT:    retq
+  %res = call <8 x i32> @llvm.x86.avx512.mask.pternlog.d.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, i32 33, i8 %x4)
+  %res1 = call <8 x i32> @llvm.x86.avx512.mask.pternlog.d.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, i32 33, i8 -1)
+  %res2 = add <8 x i32> %res, %res1
+  ret <8 x i32> %res2
+}
+
+declare <8 x i32> @llvm.x86.avx512.maskz.pternlog.d.256(<8 x i32>, <8 x i32>, <8 x i32>, i32, i8)
+
+define <8 x i32>@test_int_x86_avx512_maskz_pternlog_d_256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_maskz_pternlog_d_256:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogd $33, %ymm2, %ymm1, %ymm3 {%k1} {z}
+; CHECK-NEXT:    vpternlogd $33, %ymm2, %ymm1, %ymm0
+; CHECK-NEXT:    vpaddd %ymm0, %ymm3, %ymm0
+; CHECK-NEXT:    retq
+  %res = call <8 x i32> @llvm.x86.avx512.maskz.pternlog.d.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, i32 33, i8 %x4)
+  %res1 = call <8 x i32> @llvm.x86.avx512.maskz.pternlog.d.256(<8 x i32> %x0, <8 x i32> %x1, <8 x i32> %x2, i32 33, i8 -1)
+  %res2 = add <8 x i32> %res, %res1
+  ret <8 x i32> %res2
+}
+
+declare <2 x i64> @llvm.x86.avx512.mask.pternlog.q.128(<2 x i64>, <2 x i64>, <2 x i64>, i32, i8)
+
+define <2 x i64>@test_int_x86_avx512_mask_pternlog_q_128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_pternlog_q_128:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogq $33, %xmm2, %xmm1, %xmm3 {%k1}
+; CHECK-NEXT:    vpternlogq $33, %xmm2, %xmm1, %xmm0
+; CHECK-NEXT:    vpaddq %xmm0, %xmm3, %xmm0
+; CHECK-NEXT:    retq
+  %res = call <2 x i64> @llvm.x86.avx512.mask.pternlog.q.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2, i32 33, i8 %x4)
+  %res1 = call <2 x i64> @llvm.x86.avx512.mask.pternlog.q.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2, i32 33, i8 -1)
+  %res2 = add <2 x i64> %res, %res1
+  ret <2 x i64> %res2
+}
+
+declare <2 x i64> @llvm.x86.avx512.maskz.pternlog.q.128(<2 x i64>, <2 x i64>, <2 x i64>, i32, i8)
+
+define <2 x i64>@test_int_x86_avx512_maskz_pternlog_q_128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_maskz_pternlog_q_128:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogq $33, %xmm2, %xmm1, %xmm3 {%k1} {z}
+; CHECK-NEXT:    vpternlogq $33, %xmm2, %xmm1, %xmm0
+; CHECK-NEXT:    vpaddq %xmm0, %xmm3, %xmm0
+; CHECK-NEXT:    retq
+  %res = call <2 x i64> @llvm.x86.avx512.maskz.pternlog.q.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2, i32 33, i8 %x4)
+  %res1 = call <2 x i64> @llvm.x86.avx512.maskz.pternlog.q.128(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2, i32 33, i8 -1)
+  %res2 = add <2 x i64> %res, %res1
+  ret <2 x i64> %res2
+}
+
+declare <4 x i64> @llvm.x86.avx512.mask.pternlog.q.256(<4 x i64>, <4 x i64>, <4 x i64>, i32, i8)
+
+define <4 x i64>@test_int_x86_avx512_mask_pternlog_q_256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_mask_pternlog_q_256:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogq $33, %ymm2, %ymm1, %ymm3 {%k1}
+; CHECK-NEXT:    vpternlogq $33, %ymm2, %ymm1, %ymm0
+; CHECK-NEXT:    vpaddq %ymm0, %ymm3, %ymm0
+; CHECK-NEXT:    retq
+  %res = call <4 x i64> @llvm.x86.avx512.mask.pternlog.q.256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2, i32 33, i8 %x4)
+  %res1 = call <4 x i64> @llvm.x86.avx512.mask.pternlog.q.256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2, i32 33, i8 -1)
+  %res2 = add <4 x i64> %res, %res1
+  ret <4 x i64> %res2
+}
+
+declare <4 x i64> @llvm.x86.avx512.maskz.pternlog.q.256(<4 x i64>, <4 x i64>, <4 x i64>, i32, i8)
+
+define <4 x i64>@test_int_x86_avx512_maskz_pternlog_q_256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2, i8 %x4) {
+; CHECK-LABEL: test_int_x86_avx512_maskz_pternlog_q_256:
+; CHECK:       ## BB#0:
+; CHECK-NEXT:    movzbl %dil, %eax
+; CHECK-NEXT:    kmovw %eax, %k1
+; CHECK-NEXT:    vmovaps %zmm0, %zmm3
+; CHECK-NEXT:    vpternlogq $33, %ymm2, %ymm1, %ymm3 {%k1} {z}
+; CHECK-NEXT:    vpternlogq $33, %ymm2, %ymm1, %ymm0
+; CHECK-NEXT:    vpaddq %ymm0, %ymm3, %ymm0
+; CHECK-NEXT:    retq
+  %res = call <4 x i64> @llvm.x86.avx512.maskz.pternlog.q.256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2, i32 33, i8 %x4)
+  %res1 = call <4 x i64> @llvm.x86.avx512.maskz.pternlog.q.256(<4 x i64> %x0, <4 x i64> %x1, <4 x i64> %x2, i32 33, i8 -1)
+  %res2 = add <4 x i64> %res, %res1
+  ret <4 x i64> %res2
+}
diff --git a/llvm/test/MC/X86/avx512-encodings.s b/llvm/test/MC/X86/avx512-encodings.s
index c0e01a53913..2a9bf16d378 100644
--- a/llvm/test/MC/X86/avx512-encodings.s
+++ b/llvm/test/MC/X86/avx512-encodings.s
@@ -17612,3 +17612,124 @@ vpermilpd $0x23, 0x400(%rbx), %zmm2
 // CHECK: vrcp14ss -516(%rdx), %xmm8, %xmm8
 // CHECK:  encoding: [0x62,0x72,0x3d,0x08,0x4d,0x82,0xfc,0xfd,0xff,0xff]
           vrcp14ss -516(%rdx), %xmm8, %xmm8
+
+// CHECK: vpternlogd $171, %zmm20, %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x33,0x0d,0x48,0x25,0xe4,0xab]
+          vpternlogd $0xab, %zmm20, %zmm14, %zmm12
+
+// CHECK: vpternlogd $171, %zmm20, %zmm14, %zmm12 {%k7}
+// CHECK:  encoding: [0x62,0x33,0x0d,0x4f,0x25,0xe4,0xab]
+          vpternlogd $0xab, %zmm20, %zmm14, %zmm12 {%k7}
+
+// CHECK: vpternlogd $171, %zmm20, %zmm14, %zmm12 {%k7} {z}
+// CHECK:  encoding: [0x62,0x33,0x0d,0xcf,0x25,0xe4,0xab]
+          vpternlogd $0xab, %zmm20, %zmm14, %zmm12 {%k7} {z}
+
+// CHECK: vpternlogd $123, %zmm20, %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x33,0x0d,0x48,0x25,0xe4,0x7b]
+          vpternlogd $0x7b, %zmm20, %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, (%rcx), %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x48,0x25,0x21,0x7b]
+          vpternlogd $0x7b, (%rcx), %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, 291(%rax,%r14,8), %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x33,0x0d,0x48,0x25,0xa4,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 291(%rax,%r14,8), %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, (%rcx){1to16}, %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x58,0x25,0x21,0x7b]
+          vpternlogd $0x7b, (%rcx){1to16}, %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, 8128(%rdx), %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x48,0x25,0x62,0x7f,0x7b]
+          vpternlogd $0x7b, 8128(%rdx), %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, 8192(%rdx), %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x48,0x25,0xa2,0x00,0x20,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 8192(%rdx), %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, -8192(%rdx), %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x48,0x25,0x62,0x80,0x7b]
+          vpternlogd $0x7b, -8192(%rdx), %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, -8256(%rdx), %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x48,0x25,0xa2,0xc0,0xdf,0xff,0xff,0x7b]
+          vpternlogd $0x7b, -8256(%rdx), %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, 508(%rdx){1to16}, %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x58,0x25,0x62,0x7f,0x7b]
+          vpternlogd $0x7b, 508(%rdx){1to16}, %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, 512(%rdx){1to16}, %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x58,0x25,0xa2,0x00,0x02,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 512(%rdx){1to16}, %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, -512(%rdx){1to16}, %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x58,0x25,0x62,0x80,0x7b]
+          vpternlogd $0x7b, -512(%rdx){1to16}, %zmm14, %zmm12
+
+// CHECK: vpternlogd $123, -516(%rdx){1to16}, %zmm14, %zmm12
+// CHECK:  encoding: [0x62,0x73,0x0d,0x58,0x25,0xa2,0xfc,0xfd,0xff,0xff,0x7b]
+          vpternlogd $0x7b, -516(%rdx){1to16}, %zmm14, %zmm12
+
+// CHECK: vpternlogq $171, %zmm21, %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x33,0xed,0x48,0x25,0xfd,0xab]
+          vpternlogq $0xab, %zmm21, %zmm2, %zmm15
+
+// CHECK: vpternlogq $171, %zmm21, %zmm2, %zmm15 {%k3}
+// CHECK:  encoding: [0x62,0x33,0xed,0x4b,0x25,0xfd,0xab]
+          vpternlogq $0xab, %zmm21, %zmm2, %zmm15 {%k3}
+
+// CHECK: vpternlogq $171, %zmm21, %zmm2, %zmm15 {%k3} {z}
+// CHECK:  encoding: [0x62,0x33,0xed,0xcb,0x25,0xfd,0xab]
+          vpternlogq $0xab, %zmm21, %zmm2, %zmm15 {%k3} {z}
+
+// CHECK: vpternlogq $123, %zmm21, %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x33,0xed,0x48,0x25,0xfd,0x7b]
+          vpternlogq $0x7b, %zmm21, %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, (%rcx), %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x48,0x25,0x39,0x7b]
+          vpternlogq $0x7b, (%rcx), %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, 291(%rax,%r14,8), %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x33,0xed,0x48,0x25,0xbc,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 291(%rax,%r14,8), %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, (%rcx){1to8}, %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x58,0x25,0x39,0x7b]
+          vpternlogq $0x7b, (%rcx){1to8}, %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, 8128(%rdx), %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x48,0x25,0x7a,0x7f,0x7b]
+          vpternlogq $0x7b, 8128(%rdx), %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, 8192(%rdx), %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x48,0x25,0xba,0x00,0x20,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 8192(%rdx), %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, -8192(%rdx), %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x48,0x25,0x7a,0x80,0x7b]
+          vpternlogq $0x7b, -8192(%rdx), %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, -8256(%rdx), %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x48,0x25,0xba,0xc0,0xdf,0xff,0xff,0x7b]
+          vpternlogq $0x7b, -8256(%rdx), %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, 1016(%rdx){1to8}, %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x58,0x25,0x7a,0x7f,0x7b]
+          vpternlogq $0x7b, 1016(%rdx){1to8}, %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, 1024(%rdx){1to8}, %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x58,0x25,0xba,0x00,0x04,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 1024(%rdx){1to8}, %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, -1024(%rdx){1to8}, %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x58,0x25,0x7a,0x80,0x7b]
+          vpternlogq $0x7b, -1024(%rdx){1to8}, %zmm2, %zmm15
+
+// CHECK: vpternlogq $123, -1032(%rdx){1to8}, %zmm2, %zmm15
+// CHECK:  encoding: [0x62,0x73,0xed,0x58,0x25,0xba,0xf8,0xfb,0xff,0xff,0x7b]
+          vpternlogq $0x7b, -1032(%rdx){1to8}, %zmm2, %zmm15
+
diff --git a/llvm/test/MC/X86/x86-64-avx512f_vl.s b/llvm/test/MC/X86/x86-64-avx512f_vl.s
index 2842b3f7fa8..b6bc85bcb5d 100644
--- a/llvm/test/MC/X86/x86-64-avx512f_vl.s
+++ b/llvm/test/MC/X86/x86-64-avx512f_vl.s
@@ -21322,3 +21322,244 @@ vaddpd  {rz-sae}, %zmm2, %zmm1, %zmm1
 // CHECK: vcvttpd2udq -1032(%rdx){1to4}, %xmm28
 // CHECK:  encoding: [0x62,0x61,0xfc,0x38,0x78,0xa2,0xf8,0xfb,0xff,0xff]
           vcvttpd2udq -1032(%rdx){1to4}, %xmm28
+
+// CHECK: vpternlogd $171, %xmm25, %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x03,0x65,0x00,0x25,0xd9,0xab]
+          vpternlogd $0xab, %xmm25, %xmm19, %xmm27
+
+// CHECK: vpternlogd $171, %xmm25, %xmm19, %xmm27 {%k7}
+// CHECK:  encoding: [0x62,0x03,0x65,0x07,0x25,0xd9,0xab]
+          vpternlogd $0xab, %xmm25, %xmm19, %xmm27 {%k7}
+
+// CHECK: vpternlogd $171, %xmm25, %xmm19, %xmm27 {%k7} {z}
+// CHECK:  encoding: [0x62,0x03,0x65,0x87,0x25,0xd9,0xab]
+          vpternlogd $0xab, %xmm25, %xmm19, %xmm27 {%k7} {z}
+
+// CHECK: vpternlogd $123, %xmm25, %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x03,0x65,0x00,0x25,0xd9,0x7b]
+          vpternlogd $0x7b, %xmm25, %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, (%rcx), %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x00,0x25,0x19,0x7b]
+          vpternlogd $0x7b, (%rcx), %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, 291(%rax,%r14,8), %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x23,0x65,0x00,0x25,0x9c,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 291(%rax,%r14,8), %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, (%rcx){1to4}, %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x10,0x25,0x19,0x7b]
+          vpternlogd $0x7b, (%rcx){1to4}, %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, 2032(%rdx), %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x00,0x25,0x5a,0x7f,0x7b]
+          vpternlogd $0x7b, 2032(%rdx), %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, 2048(%rdx), %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x00,0x25,0x9a,0x00,0x08,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 2048(%rdx), %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, -2048(%rdx), %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x00,0x25,0x5a,0x80,0x7b]
+          vpternlogd $0x7b, -2048(%rdx), %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, -2064(%rdx), %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x00,0x25,0x9a,0xf0,0xf7,0xff,0xff,0x7b]
+          vpternlogd $0x7b, -2064(%rdx), %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, 508(%rdx){1to4}, %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x10,0x25,0x5a,0x7f,0x7b]
+          vpternlogd $0x7b, 508(%rdx){1to4}, %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, 512(%rdx){1to4}, %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x10,0x25,0x9a,0x00,0x02,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 512(%rdx){1to4}, %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, -512(%rdx){1to4}, %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x10,0x25,0x5a,0x80,0x7b]
+          vpternlogd $0x7b, -512(%rdx){1to4}, %xmm19, %xmm27
+
+// CHECK: vpternlogd $123, -516(%rdx){1to4}, %xmm19, %xmm27
+// CHECK:  encoding: [0x62,0x63,0x65,0x10,0x25,0x9a,0xfc,0xfd,0xff,0xff,0x7b]
+          vpternlogd $0x7b, -516(%rdx){1to4}, %xmm19, %xmm27
+
+// CHECK: vpternlogd $171, %ymm20, %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x23,0x75,0x20,0x25,0xec,0xab]
+          vpternlogd $0xab, %ymm20, %ymm17, %ymm29
+
+// CHECK: vpternlogd $171, %ymm20, %ymm17, %ymm29 {%k3}
+// CHECK:  encoding: [0x62,0x23,0x75,0x23,0x25,0xec,0xab]
+          vpternlogd $0xab, %ymm20, %ymm17, %ymm29 {%k3}
+
+// CHECK: vpternlogd $171, %ymm20, %ymm17, %ymm29 {%k3} {z}
+// CHECK:  encoding: [0x62,0x23,0x75,0xa3,0x25,0xec,0xab]
+          vpternlogd $0xab, %ymm20, %ymm17, %ymm29 {%k3} {z}
+
+// CHECK: vpternlogd $123, %ymm20, %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x23,0x75,0x20,0x25,0xec,0x7b]
+          vpternlogd $0x7b, %ymm20, %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, (%rcx), %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x20,0x25,0x29,0x7b]
+          vpternlogd $0x7b, (%rcx), %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, 291(%rax,%r14,8), %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x23,0x75,0x20,0x25,0xac,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 291(%rax,%r14,8), %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, (%rcx){1to8}, %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x30,0x25,0x29,0x7b]
+          vpternlogd $0x7b, (%rcx){1to8}, %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, 4064(%rdx), %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x20,0x25,0x6a,0x7f,0x7b]
+          vpternlogd $0x7b, 4064(%rdx), %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, 4096(%rdx), %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x20,0x25,0xaa,0x00,0x10,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 4096(%rdx), %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, -4096(%rdx), %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x20,0x25,0x6a,0x80,0x7b]
+          vpternlogd $0x7b, -4096(%rdx), %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, -4128(%rdx), %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x20,0x25,0xaa,0xe0,0xef,0xff,0xff,0x7b]
+          vpternlogd $0x7b, -4128(%rdx), %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, 508(%rdx){1to8}, %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x30,0x25,0x6a,0x7f,0x7b]
+          vpternlogd $0x7b, 508(%rdx){1to8}, %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, 512(%rdx){1to8}, %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x30,0x25,0xaa,0x00,0x02,0x00,0x00,0x7b]
+          vpternlogd $0x7b, 512(%rdx){1to8}, %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, -512(%rdx){1to8}, %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x30,0x25,0x6a,0x80,0x7b]
+          vpternlogd $0x7b, -512(%rdx){1to8}, %ymm17, %ymm29
+
+// CHECK: vpternlogd $123, -516(%rdx){1to8}, %ymm17, %ymm29
+// CHECK:  encoding: [0x62,0x63,0x75,0x30,0x25,0xaa,0xfc,0xfd,0xff,0xff,0x7b]
+          vpternlogd $0x7b, -516(%rdx){1to8}, %ymm17, %ymm29
+
+// CHECK: vpternlogq $171, %xmm22, %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xa3,0xb5,0x00,0x25,0xce,0xab]
+          vpternlogq $0xab, %xmm22, %xmm25, %xmm17
+
+// CHECK: vpternlogq $171, %xmm22, %xmm25, %xmm17 {%k1}
+// CHECK:  encoding: [0x62,0xa3,0xb5,0x01,0x25,0xce,0xab]
+          vpternlogq $0xab, %xmm22, %xmm25, %xmm17 {%k1}
+
+// CHECK: vpternlogq $171, %xmm22, %xmm25, %xmm17 {%k1} {z}
+// CHECK:  encoding: [0x62,0xa3,0xb5,0x81,0x25,0xce,0xab]
+          vpternlogq $0xab, %xmm22, %xmm25, %xmm17 {%k1} {z}
+
+// CHECK: vpternlogq $123, %xmm22, %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xa3,0xb5,0x00,0x25,0xce,0x7b]
+          vpternlogq $0x7b, %xmm22, %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, (%rcx), %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x00,0x25,0x09,0x7b]
+          vpternlogq $0x7b, (%rcx), %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, 291(%rax,%r14,8), %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xa3,0xb5,0x00,0x25,0x8c,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 291(%rax,%r14,8), %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, (%rcx){1to2}, %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x10,0x25,0x09,0x7b]
+          vpternlogq $0x7b, (%rcx){1to2}, %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, 2032(%rdx), %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x00,0x25,0x4a,0x7f,0x7b]
+          vpternlogq $0x7b, 2032(%rdx), %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, 2048(%rdx), %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x00,0x25,0x8a,0x00,0x08,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 2048(%rdx), %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, -2048(%rdx), %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x00,0x25,0x4a,0x80,0x7b]
+          vpternlogq $0x7b, -2048(%rdx), %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, -2064(%rdx), %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x00,0x25,0x8a,0xf0,0xf7,0xff,0xff,0x7b]
+          vpternlogq $0x7b, -2064(%rdx), %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, 1016(%rdx){1to2}, %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x10,0x25,0x4a,0x7f,0x7b]
+          vpternlogq $0x7b, 1016(%rdx){1to2}, %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, 1024(%rdx){1to2}, %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x10,0x25,0x8a,0x00,0x04,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 1024(%rdx){1to2}, %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, -1024(%rdx){1to2}, %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x10,0x25,0x4a,0x80,0x7b]
+          vpternlogq $0x7b, -1024(%rdx){1to2}, %xmm25, %xmm17
+
+// CHECK: vpternlogq $123, -1032(%rdx){1to2}, %xmm25, %xmm17
+// CHECK:  encoding: [0x62,0xe3,0xb5,0x10,0x25,0x8a,0xf8,0xfb,0xff,0xff,0x7b]
+          vpternlogq $0x7b, -1032(%rdx){1to2}, %xmm25, %xmm17
+
+// CHECK: vpternlogq $171, %ymm25, %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x03,0xc5,0x20,0x25,0xd1,0xab]
+          vpternlogq $0xab, %ymm25, %ymm23, %ymm26
+
+// CHECK: vpternlogq $171, %ymm25, %ymm23, %ymm26 {%k6}
+// CHECK:  encoding: [0x62,0x03,0xc5,0x26,0x25,0xd1,0xab]
+          vpternlogq $0xab, %ymm25, %ymm23, %ymm26 {%k6}
+
+// CHECK: vpternlogq $171, %ymm25, %ymm23, %ymm26 {%k6} {z}
+// CHECK:  encoding: [0x62,0x03,0xc5,0xa6,0x25,0xd1,0xab]
+          vpternlogq $0xab, %ymm25, %ymm23, %ymm26 {%k6} {z}
+
+// CHECK: vpternlogq $123, %ymm25, %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x03,0xc5,0x20,0x25,0xd1,0x7b]
+          vpternlogq $0x7b, %ymm25, %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, (%rcx), %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x20,0x25,0x11,0x7b]
+          vpternlogq $0x7b, (%rcx), %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, 291(%rax,%r14,8), %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x23,0xc5,0x20,0x25,0x94,0xf0,0x23,0x01,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 291(%rax,%r14,8), %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, (%rcx){1to4}, %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x30,0x25,0x11,0x7b]
+          vpternlogq $0x7b, (%rcx){1to4}, %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, 4064(%rdx), %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x20,0x25,0x52,0x7f,0x7b]
+          vpternlogq $0x7b, 4064(%rdx), %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, 4096(%rdx), %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x20,0x25,0x92,0x00,0x10,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 4096(%rdx), %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, -4096(%rdx), %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x20,0x25,0x52,0x80,0x7b]
+          vpternlogq $0x7b, -4096(%rdx), %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, -4128(%rdx), %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x20,0x25,0x92,0xe0,0xef,0xff,0xff,0x7b]
+          vpternlogq $0x7b, -4128(%rdx), %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, 1016(%rdx){1to4}, %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x30,0x25,0x52,0x7f,0x7b]
+          vpternlogq $0x7b, 1016(%rdx){1to4}, %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, 1024(%rdx){1to4}, %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x30,0x25,0x92,0x00,0x04,0x00,0x00,0x7b]
+          vpternlogq $0x7b, 1024(%rdx){1to4}, %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, -1024(%rdx){1to4}, %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x30,0x25,0x52,0x80,0x7b]
+          vpternlogq $0x7b, -1024(%rdx){1to4}, %ymm23, %ymm26
+
+// CHECK: vpternlogq $123, -1032(%rdx){1to4}, %ymm23, %ymm26
+// CHECK:  encoding: [0x62,0x63,0xc5,0x30,0x25,0x92,0xf8,0xfb,0xff,0xff,0x7b]
+          vpternlogq $0x7b, -1032(%rdx){1to4}, %ymm23, %ymm26
+