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| author | Chad Rosier <mcrosier@apple.com> | 2011-05-26 23:13:19 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2011-05-26 23:13:19 +0000 |
| commit | b362884ca92ce7de431de913a653827d41076683 (patch) | |
| tree | a92729ac757076fa425457af08071fbdc646b35e /llvm/test | |
| parent | 017b959ad5749bc4fc8322b0468ea8f4f6540afc (diff) | |
| download | bcm5719-llvm-b362884ca92ce7de431de913a653827d41076683.tar.gz bcm5719-llvm-b362884ca92ce7de431de913a653827d41076683.zip | |
Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist.
crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].
llvm-svn: 132163
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/sse42.ll | 31 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/sse42_64.ll | 21 | ||||
| -rw-r--r-- | llvm/test/Transforms/InstCombine/x86-crc32-demanded.ll | 6 |
3 files changed, 40 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/X86/sse42.ll b/llvm/test/CodeGen/X86/sse42.ll index f415439cd47..c7875238ec8 100644 --- a/llvm/test/CodeGen/X86/sse42.ll +++ b/llvm/test/CodeGen/X86/sse42.ll @@ -1,38 +1,39 @@ ; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X32 ; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64 -declare i32 @llvm.x86.sse42.crc32.8(i32, i8) nounwind -declare i32 @llvm.x86.sse42.crc32.16(i32, i16) nounwind -declare i32 @llvm.x86.sse42.crc32.32(i32, i32) nounwind +declare i32 @llvm.x86.sse42.crc32.32.8(i32, i8) nounwind +declare i32 @llvm.x86.sse42.crc32.32.16(i32, i16) nounwind +declare i32 @llvm.x86.sse42.crc32.32.32(i32, i32) nounwind -define i32 @crc32_8(i32 %a, i8 %b) nounwind { - %tmp = call i32 @llvm.x86.sse42.crc32.8(i32 %a, i8 %b) +define i32 @crc32_32_8(i32 %a, i8 %b) nounwind { + %tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b) ret i32 %tmp -; X32: _crc32_8: +; X32: _crc32_32_8: ; X32: crc32b 8(%esp), %eax -; X64: _crc32_8: +; X64: _crc32_32_8: ; X64: crc32b %sil, } -define i32 @crc32_16(i32 %a, i16 %b) nounwind { - %tmp = call i32 @llvm.x86.sse42.crc32.16(i32 %a, i16 %b) +define i32 @crc32_32_16(i32 %a, i16 %b) nounwind { + %tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b) ret i32 %tmp -; X32: _crc32_16: +; X32: _crc32_32_16: ; X32: crc32w 8(%esp), %eax -; X64: _crc32_16: +; X64: _crc32_32_16: ; X64: crc32w %si, } -define i32 @crc32_32(i32 %a, i32 %b) nounwind { - %tmp = call i32 @llvm.x86.sse42.crc32.32(i32 %a, i32 %b) +define i32 @crc32_32_32(i32 %a, i32 %b) nounwind { + %tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b) ret i32 %tmp -; X32: _crc32_32: +; X32: _crc32_32_32: ; X32: crc32l 8(%esp), %eax -; X64: _crc32_32: +; X64: _crc32_32_32: ; X64: crc32l %esi, } + diff --git a/llvm/test/CodeGen/X86/sse42_64.ll b/llvm/test/CodeGen/X86/sse42_64.ll new file mode 100644 index 00000000000..8b3a69bcaaf --- /dev/null +++ b/llvm/test/CodeGen/X86/sse42_64.ll @@ -0,0 +1,21 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=sse42 | FileCheck %s -check-prefix=X64 + +declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind +declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind + +define i64 @crc32_64_8(i64 %a, i8 %b) nounwind { + %tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b) + ret i64 %tmp + +; X64: _crc32_64_8: +; X64: crc32b %sil, +} + +define i64 @crc32_64_64(i64 %a, i64 %b) nounwind { + %tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b) + ret i64 %tmp + +; X64: _crc32_64_64: +; X64: crc32q %rsi, +} + diff --git a/llvm/test/Transforms/InstCombine/x86-crc32-demanded.ll b/llvm/test/Transforms/InstCombine/x86-crc32-demanded.ll index be257ac4c7b..878b97d1bb2 100644 --- a/llvm/test/Transforms/InstCombine/x86-crc32-demanded.ll +++ b/llvm/test/Transforms/InstCombine/x86-crc32-demanded.ll @@ -6,12 +6,12 @@ define i64 @test() nounwind { entry: ; CHECK: test -; CHECK: tail call i64 @llvm.x86.sse42.crc64.64 +; CHECK: tail call i64 @llvm.x86.sse42.crc32.64.64 ; CHECK-NOT: and ; CHECK: ret - %0 = tail call i64 @llvm.x86.sse42.crc64.64(i64 0, i64 4) nounwind + %0 = tail call i64 @llvm.x86.sse42.crc32.64.64(i64 0, i64 4) nounwind %1 = and i64 %0, 4294967295 ret i64 %1 } -declare i64 @llvm.x86.sse42.crc64.64(i64, i64) nounwind readnone +declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind readnone |

