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authorEvan Cheng <evan.cheng@apple.com>2009-11-19 06:57:41 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-11-19 06:57:41 +0000
commitb18525937c566368ec9bbfa98dc37b72aaa85f19 (patch)
tree22d4354f82dc774ac37f68d84998dd06aa10ccc0 /llvm/test
parent52ed5feee500abbb007e1f8bfefcc72baa74b5fa (diff)
downloadbcm5719-llvm-b18525937c566368ec9bbfa98dc37b72aaa85f19.tar.gz
bcm5719-llvm-b18525937c566368ec9bbfa98dc37b72aaa85f19.zip
More consistent thumb1 asm printing.
llvm-svn: 89328
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/Thumb/pop.ll2
-rw-r--r--llvm/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll2
-rw-r--r--llvm/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll2
-rw-r--r--llvm/test/CodeGen/Thumb2/large-stack.ll6
4 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/Thumb/pop.ll b/llvm/test/CodeGen/Thumb/pop.ll
index c5e86ad45bc..0e1b2e57440 100644
--- a/llvm/test/CodeGen/Thumb/pop.ll
+++ b/llvm/test/CodeGen/Thumb/pop.ll
@@ -4,7 +4,7 @@
define arm_apcscc void @t(i8* %a, ...) nounwind {
; CHECK: t:
; CHECK: pop {r3}
-; CHECK-NEXT: add sp, #3 * 4
+; CHECK-NEXT: add sp, #12
; CHECK-NEXT: bx r3
entry:
%a.addr = alloca i8*
diff --git a/llvm/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll b/llvm/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
index ec649c37bbe..ef076a46aea 100644
--- a/llvm/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
+++ b/llvm/test/CodeGen/Thumb2/2009-07-21-ISelBug.ll
@@ -6,7 +6,7 @@
define arm_apcscc i32 @t(i32, ...) nounwind {
entry:
; CHECK: t:
-; CHECK: add r7, sp, #3 * 4
+; CHECK: add r7, sp, #12
%1 = load i8** undef, align 4 ; <i8*> [#uses=3]
%2 = getelementptr i8* %1, i32 4 ; <i8*> [#uses=1]
%3 = getelementptr i8* %1, i32 8 ; <i8*> [#uses=1]
diff --git a/llvm/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll b/llvm/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
index 03f9facfa95..40775358a94 100644
--- a/llvm/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
+++ b/llvm/test/CodeGen/Thumb2/2009-08-06-SpDecBug.ll
@@ -6,7 +6,7 @@ define hidden arm_aapcscc i32 @__gcov_execlp(i8* %path, i8* %arg, ...) nounwind
entry:
; CHECK: __gcov_execlp:
; CHECK: mov sp, r7
-; CHECK: sub sp, #1 * 4
+; CHECK: sub sp, #4
call arm_aapcscc void @__gcov_flush() nounwind
br i1 undef, label %bb5, label %bb
diff --git a/llvm/test/CodeGen/Thumb2/large-stack.ll b/llvm/test/CodeGen/Thumb2/large-stack.ll
index 18d507c2c80..6f5996174ac 100644
--- a/llvm/test/CodeGen/Thumb2/large-stack.ll
+++ b/llvm/test/CodeGen/Thumb2/large-stack.ll
@@ -2,7 +2,7 @@
define void @test1() {
; CHECK: test1:
-; CHECK: sub sp, #64 * 4
+; CHECK: sub sp, #256
%tmp = alloca [ 64 x i32 ] , align 4
ret void
}
@@ -10,7 +10,7 @@ define void @test1() {
define void @test2() {
; CHECK: test2:
; CHECK: sub.w sp, sp, #4160
-; CHECK: sub sp, #2 * 4
+; CHECK: sub sp, #8
%tmp = alloca [ 4168 x i8 ] , align 4
ret void
}
@@ -18,7 +18,7 @@ define void @test2() {
define i32 @test3() {
; CHECK: test3:
; CHECK: sub.w sp, sp, #805306368
-; CHECK: sub sp, #6 * 4
+; CHECK: sub sp, #24
%retval = alloca i32, align 4
%tmp = alloca i32, align 4
%a = alloca [805306369 x i8], align 16
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