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authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2015-02-23 22:59:02 +0000
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>2015-02-23 22:59:02 +0000
commitaf3f397b10da571d108327d3c0d60e8dc85024e8 (patch)
treef14ac6ea5803d7dfda2175c512b96c2d69d07b97 /llvm/test
parent913dfd8f7f88645fc4de85fc28b0209448a9edfe (diff)
downloadbcm5719-llvm-af3f397b10da571d108327d3c0d60e8dc85024e8.tar.gz
bcm5719-llvm-af3f397b10da571d108327d3c0d60e8dc85024e8.zip
[X86] Teach how to custom lower double-to-half conversions under fast-math.
This patch teaches the backend how to expand a double-half conversion into a double-float conversion immediately followed by a float-half conversion. We do this only under fast-math, and if float-half conversions are legal for the target. Added test CodeGen/X86/fastmath-float-half-conversion.ll Differential Revision: http://reviews.llvm.org/D7832 llvm-svn: 230276
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll52
1 files changed, 52 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll b/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
new file mode 100644
index 00000000000..29308735cca
--- /dev/null
+++ b/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
@@ -0,0 +1,52 @@
+; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s --check-prefix=ALL --check-prefix=F16C
+; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=ALL --check-prefix=AVX
+
+define zeroext i16 @test1_fast(double %d) #0 {
+; ALL-LABEL: test1_fast:
+; F16C-NOT: callq {{_+}}truncdfhf2
+; F16C: vcvtsd2ss %xmm0, %xmm0, %xmm0
+; F16C-NEXT: vcvtps2ph $0, %xmm0, %xmm0
+; AVX: callq {{_+}}truncdfhf2
+; ALL: ret
+entry:
+ %0 = tail call i16 @llvm.convert.to.fp16.f64(double %d)
+ ret i16 %0
+}
+
+define zeroext i16 @test2_fast(x86_fp80 %d) #0 {
+; ALL-LABEL: test2_fast:
+; F16C-NOT: callq {{_+}}truncxfhf2
+; F16C: fldt
+; F16C-NEXT: fstps
+; F16C-NEXT: vmovss
+; F16C-NEXT: vcvtps2ph $0, %xmm0, %xmm0
+; AVX: callq {{_+}}truncxfhf2
+; ALL: ret
+entry:
+ %0 = tail call i16 @llvm.convert.to.fp16.f80(x86_fp80 %d)
+ ret i16 %0
+}
+
+define zeroext i16 @test1(double %d) #1 {
+; ALL-LABEL: test1:
+; ALL: callq {{_+}}truncdfhf2
+; ALL: ret
+entry:
+ %0 = tail call i16 @llvm.convert.to.fp16.f64(double %d)
+ ret i16 %0
+}
+
+define zeroext i16 @test2(x86_fp80 %d) #1 {
+; ALL-LABEL: test2:
+; ALL: callq {{_+}}truncxfhf2
+; ALL: ret
+entry:
+ %0 = tail call i16 @llvm.convert.to.fp16.f80(x86_fp80 %d)
+ ret i16 %0
+}
+
+declare i16 @llvm.convert.to.fp16.f64(double)
+declare i16 @llvm.convert.to.fp16.f80(x86_fp80)
+
+attributes #0 = { nounwind readnone uwtable "unsafe-fp-math"="true" "use-soft-float"="false" }
+attributes #1 = { nounwind readnone uwtable "unsafe-fp-math"="false" "use-soft-float"="false" }
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