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| author | Mihai Popa <mihail.popa@gmail.com> | 2013-04-30 09:00:12 +0000 |
|---|---|---|
| committer | Mihai Popa <mihail.popa@gmail.com> | 2013-04-30 09:00:12 +0000 |
| commit | af22d91af004ddf2461a294bb5690e9fd4bf7737 (patch) | |
| tree | dd42c5219f8a78a4dad0d71ebe3c7bd17ea26b3c /llvm/test | |
| parent | 8d048d0482e680d1aa566f756c60801ba2ab91a8 (diff) | |
| download | bcm5719-llvm-af22d91af004ddf2461a294bb5690e9fd4bf7737.tar.gz bcm5719-llvm-af22d91af004ddf2461a294bb5690e9fd4bf7737.zip | |
s tightens up the encoding description for ARM post-indexed ldr instructions. All instructions in this class have bit 4 cleared. It turns out that there is a test case for this, but it was marked XFAIL.
llvm-svn: 180778
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt b/llvm/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt index 0cff28ad2b2..ecab5a5758e 100644 --- a/llvm/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt +++ b/llvm/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 | grep "invalid instruction encoding" -# XFAIL: * # LDR_PRE/POST has encoding Inst{4} = 0. 0xde 0x69 0x18 0x46 |
