[X86] Add shift undef, %X tests

llvm-svn: 324637

3 files changed, 79 insertions, 0 deletions

diff --git a/llvm/test/CodeGen/X86/combine-shl.ll b/llvm/test/CodeGen/X86/combine-shl.ll
index ccd0cf96dfd..112f591961f 100644
--- a/llvm/test/CodeGen/X86/combine-shl.ll
+++ b/llvm/test/CodeGen/X86/combine-shl.ll
@@ -3,6 +3,33 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX-SLOW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX-FAST
 
+; fold (shl undef, x) -> 0
+define i32 @combine_shl_undef0(i32 %x) {
+; SSE-LABEL: combine_shl_undef0:
+; SSE:       # %bb.0:
+; SSE-NEXT:    xorl %eax, %eax
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: combine_shl_undef0:
+; AVX:       # %bb.0:
+; AVX-NEXT:    xorl %eax, %eax
+; AVX-NEXT:    retq
+  %1 = shl i32 undef, %x
+  ret i32 %1
+}
+
+define <4 x i32> @combine_vec_shl_undef0(<4 x i32> %x) {
+; SSE-LABEL: combine_vec_shl_undef0:
+; SSE:       # %bb.0:
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: combine_vec_shl_undef0:
+; AVX:       # %bb.0:
+; AVX-NEXT:    retq
+  %1 = shl <4 x i32> undef, %x
+  ret <4 x i32> %1
+}
+
 ; fold (shl 0, x) -> 0
 define <4 x i32> @combine_vec_shl_zero(<4 x i32> %x) {
 ; SSE-LABEL: combine_vec_shl_zero:
diff --git a/llvm/test/CodeGen/X86/combine-sra.ll b/llvm/test/CodeGen/X86/combine-sra.ll
index 728d67779cb..046d035e1e5 100644
--- a/llvm/test/CodeGen/X86/combine-sra.ll
+++ b/llvm/test/CodeGen/X86/combine-sra.ll
@@ -3,6 +3,31 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2-SLOW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2-FAST
 
+; fold (sra undef, x) -> undef
+define i32 @combine_lshr_undef0(i32 %x) {
+; SSE-LABEL: combine_lshr_undef0:
+; SSE:       # %bb.0:
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: combine_lshr_undef0:
+; AVX:       # %bb.0:
+; AVX-NEXT:    retq
+  %1 = ashr i32 undef, %x
+  ret i32 %1
+}
+
+define <4 x i32> @combine_vec_ashr_undef0(<4 x i32> %x) {
+; SSE-LABEL: combine_vec_ashr_undef0:
+; SSE:       # %bb.0:
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: combine_vec_ashr_undef0:
+; AVX:       # %bb.0:
+; AVX-NEXT:    retq
+  %1 = ashr <4 x i32> undef, %x
+  ret <4 x i32> %1
+}
+
 ; fold (sra 0, x) -> 0
 define <4 x i32> @combine_vec_ashr_zero(<4 x i32> %x) {
 ; SSE-LABEL: combine_vec_ashr_zero:
diff --git a/llvm/test/CodeGen/X86/combine-srl.ll b/llvm/test/CodeGen/X86/combine-srl.ll
index ba7a9a25d84..2cf9380b216 100644
--- a/llvm/test/CodeGen/X86/combine-srl.ll
+++ b/llvm/test/CodeGen/X86/combine-srl.ll
@@ -3,6 +3,33 @@
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2-SLOW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2-FAST
 
+; fold (srl undef, x) -> 0
+define i32 @combine_lshr_undef0(i32 %x) {
+; SSE-LABEL: combine_lshr_undef0:
+; SSE:       # %bb.0:
+; SSE-NEXT:    xorl %eax, %eax
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: combine_lshr_undef0:
+; AVX:       # %bb.0:
+; AVX-NEXT:    xorl %eax, %eax
+; AVX-NEXT:    retq
+  %1 = lshr i32 undef, %x
+  ret i32 %1
+}
+
+define <4 x i32> @combine_vec_lshr_undef0(<4 x i32> %x) {
+; SSE-LABEL: combine_vec_lshr_undef0:
+; SSE:       # %bb.0:
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: combine_vec_lshr_undef0:
+; AVX:       # %bb.0:
+; AVX-NEXT:    retq
+  %1 = lshr <4 x i32> undef, %x
+  ret <4 x i32> %1
+}
+
 ; fold (srl 0, x) -> 0
 define <4 x i32> @combine_vec_lshr_zero(<4 x i32> %x) {
 ; SSE-LABEL: combine_vec_lshr_zero: