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authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-06-17 17:47:28 +0000
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-06-17 17:47:28 +0000
commitad04e7ad42663161ebc164cb0098826b38a4e0d2 (patch)
treee43faf244c4be39838c6d877485adf7e9defd667 /llvm/test
parentb8e8b1769ffa28fb09eb5e5e761840ece5531ba5 (diff)
downloadbcm5719-llvm-ad04e7ad42663161ebc164cb0098826b38a4e0d2.tar.gz
bcm5719-llvm-ad04e7ad42663161ebc164cb0098826b38a4e0d2.zip
[AMDGPU] Pass to propagate ABI attributes from kernels to the functions
The pass works in two modes: Mode 1: Just set attributes starting from kernels. This can work at the very beginning of opt and llc pipeline, but cannot clone functions because it must be a function pass. Mode 2: Actually clone functions for new attributes. This can only work after all function passes in the opt pipeline because it has to be a module pass. Differential Revision: https://reviews.llvm.org/D63208 llvm-svn: 363586
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/AMDGPU/propagate-attributes-clone.ll87
-rw-r--r--llvm/test/CodeGen/AMDGPU/propagate-attributes-single-set.ll72
2 files changed, 159 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/propagate-attributes-clone.ll b/llvm/test/CodeGen/AMDGPU/propagate-attributes-clone.ll
new file mode 100644
index 00000000000..b9c36217aaa
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/propagate-attributes-clone.ll
@@ -0,0 +1,87 @@
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -O1 < %s | FileCheck -check-prefix=OPT %s
+; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=LLC %s
+
+; OPT: declare void @foo4() local_unnamed_addr #0
+; OPT: define internal fastcc void @foo3.2() unnamed_addr #1
+; OPT: define void @foo2() local_unnamed_addr #1
+; OPT: define internal fastcc void @foo1.1() unnamed_addr #1
+; OPT: define amdgpu_kernel void @kernel1() local_unnamed_addr #2
+; OPT: define amdgpu_kernel void @kernel2() local_unnamed_addr #3
+; OPT: define amdgpu_kernel void @kernel3() local_unnamed_addr #3
+; OPT: define void @foo1() local_unnamed_addr #4
+; OPT: define void @foo3() local_unnamed_addr #4
+; OPT: attributes #0 = { {{.*}} "target-features"="+wavefrontsize64" }
+; OPT: attributes #1 = { {{.*}} "target-features"="{{.*}},-wavefrontsize16,-wavefrontsize32,+wavefrontsize64{{.*}}" }
+; OPT: attributes #2 = { {{.*}} "target-features"="+wavefrontsize32" }
+; OPT: attributes #3 = { {{.*}} "target-features"="+wavefrontsize64" }
+; OPT: attributes #4 = { {{.*}} "target-features"="{{.*}},-wavefrontsize16,+wavefrontsize32,-wavefrontsize64{{.*}}" }
+
+; LLC: foo3:
+; LLC: sample asm
+; LLC: foo2:
+; LLC: sample asm
+; LLC: foo1:
+; LLC: foo4@gotpcrel32@lo+4
+; LLC: foo4@gotpcrel32@hi+4
+; LLC: foo3@gotpcrel32@lo+4
+; LLC: foo3@gotpcrel32@hi+4
+; LLC: foo2@gotpcrel32@lo+4
+; LLC: foo2@gotpcrel32@hi+4
+; LLC: foo1@gotpcrel32@lo+4
+; LLC: foo1@gotpcrel32@hi+4
+; LLC: kernel1:
+; LLC: foo1@gotpcrel32@lo+4
+; LLC: foo1@gotpcrel32@hi+4
+; LLC: kernel2:
+; LLC: foo2@gotpcrel32@lo+4
+; LLC: foo2@gotpcrel32@hi+4
+; LLC: kernel3:
+; LLC: foo1@gotpcrel32@lo+4
+; LLC: foo1@gotpcrel32@hi+4
+
+declare void @foo4() #1
+
+define void @foo3() #1 {
+entry:
+ call void asm sideeffect "; sample asm", ""()
+ ret void
+}
+
+define void @foo2() #1 {
+entry:
+ call void asm sideeffect "; sample asm", ""()
+ ret void
+}
+
+define void @foo1() #1 {
+entry:
+ tail call void @foo4()
+ tail call void @foo3()
+ tail call void @foo2()
+ tail call void @foo2()
+ tail call void @foo1()
+ ret void
+}
+
+define amdgpu_kernel void @kernel1() #0 {
+entry:
+ tail call void @foo1()
+ ret void
+}
+
+define amdgpu_kernel void @kernel2() #2 {
+entry:
+ tail call void @foo2()
+ ret void
+}
+
+define amdgpu_kernel void @kernel3() #3 {
+entry:
+ tail call void @foo1()
+ ret void
+}
+
+attributes #0 = { nounwind "target-features"="+wavefrontsize32" }
+attributes #1 = { noinline nounwind "target-features"="+wavefrontsize64" }
+attributes #2 = { nounwind "target-features"="+wavefrontsize64" }
+attributes #3 = { nounwind "target-features"="+wavefrontsize64" }
diff --git a/llvm/test/CodeGen/AMDGPU/propagate-attributes-single-set.ll b/llvm/test/CodeGen/AMDGPU/propagate-attributes-single-set.ll
new file mode 100644
index 00000000000..34882586533
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/propagate-attributes-single-set.ll
@@ -0,0 +1,72 @@
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -O1 < %s | FileCheck -check-prefix=OPT %s
+; RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=LLC %s
+
+; OPT: declare void @foo4() local_unnamed_addr #0
+; OPT: define void @foo3() local_unnamed_addr #1
+; OPT: define void @foo2() local_unnamed_addr #1
+; OPT: define void @foo1() local_unnamed_addr #1
+; OPT: define amdgpu_kernel void @kernel1() local_unnamed_addr #2
+; OPT: define amdgpu_kernel void @kernel2() local_unnamed_addr #2
+; OPT: attributes #0 = { {{.*}} "target-features"="+wavefrontsize64" }
+; OPT: attributes #1 = { {{.*}} "target-features"="{{.*}},-wavefrontsize16,+wavefrontsize32,-wavefrontsize64
+; OPT: attributes #2 = { {{.*}} "target-features"="+wavefrontsize32
+; OPT: attributes #3 = { nounwind }
+
+; LLC: foo3:
+; LLC: sample asm
+; LLC: foo2:
+; LLC: sample asm
+; LLC: foo1:
+; LLC: foo4@gotpcrel32@lo+4
+; LLC: foo4@gotpcrel32@hi+4
+; LLC: foo3@gotpcrel32@lo+4
+; LLC: foo3@gotpcrel32@hi+4
+; LLC: foo2@gotpcrel32@lo+4
+; LLC: foo2@gotpcrel32@hi+4
+; LLC: foo1@gotpcrel32@lo+4
+; LLC: foo1@gotpcrel32@hi+4
+; LLC: kernel1:
+; LLC: foo1@gotpcrel32@lo+4
+; LLC: foo1@gotpcrel32@hi+4
+; LLC: kernel2:
+; LLC: foo2@gotpcrel32@lo+4
+; LLC: foo2@gotpcrel32@hi+4
+
+declare void @foo4() #1
+
+define void @foo3() #1 {
+entry:
+ call void asm sideeffect "; sample asm", ""()
+ ret void
+}
+
+define void @foo2() #1 {
+entry:
+ call void asm sideeffect "; sample asm", ""()
+ ret void
+}
+
+define void @foo1() #1 {
+entry:
+ tail call void @foo4()
+ tail call void @foo3()
+ tail call void @foo2()
+ tail call void @foo2()
+ tail call void @foo1()
+ ret void
+}
+
+define amdgpu_kernel void @kernel1() #0 {
+entry:
+ tail call void @foo1()
+ ret void
+}
+
+define amdgpu_kernel void @kernel2() #0 {
+entry:
+ tail call void @foo2()
+ ret void
+}
+
+attributes #0 = { nounwind "target-features"="+wavefrontsize32" }
+attributes #1 = { noinline nounwind "target-features"="+wavefrontsize64" }
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