[MCA][Bottleneck Analysis] Teach how to compute a critical sequence of instructions based on the simulation.

This patch teaches the bottleneck analysis how to identify and print the most
expensive sequence of instructions according to the simulation. Fixes PR37494.

The goal is to help users identify the sequence of instruction which is most
critical for performance.

A dependency graph is internally used by the bottleneck analysis to describe
data dependencies and processor resource interferences between instructions.

There is one node in the graph for every instruction in the input assembly
sequence. The number of nodes in the graph is independent from the number of
iterations simulated by the tool. It means that a single node of the graph
represents all the possible instances of a same instruction contributed by the
simulated iterations.

Edges are dynamically "discovered" by the bottleneck analysis by observing
instruction state transitions and "backend pressure increase" events generated
by the Execute stage. Information from the events is used to identify critical
dependencies, and materialize edges in the graph. A dependency edge is uniquely
identified by a pair of node identifiers plus an instance of struct
DependencyEdge::Dependency (which provides more details about the actual
dependency kind).

The bottleneck analysis internally ranks dependency edges based on their impact
on the runtime (see field DependencyEdge::Dependency::Cost). To this end, each
edge of the graph has an associated cost. By default, the cost of an edge is a
function of its latency (in cycles). In practice, the cost of an edge is also a
function of the number of cycles where the dependency has been seen as
'contributing to backend pressure increases'. The idea is that the higher the
cost of an edge, the higher is the impact of the dependency on performance. To
put it in another way, the cost of an edge is a measure of criticality for
performance.

Note how a same edge may be found in multiple iteration of the simulated loop.
The logic that adds new edges to the graph checks if an equivalent dependency
already exists (duplicate edges are not allowed). If an equivalent dependency
edge is found, field DependencyEdge::Frequency of that edge is incremented by
one, and the new cost is cumulatively added to the existing edge cost.

At the end of simulation, costs are propagated to nodes through the edges of the
graph. The goal is to identify a critical sequence from a node of the root-set
(composed by node of the graph with no predecessors) to a 'sink node' with no
successors.  Note that the graph is intentionally kept acyclic to minimize the
complexity of the critical sequence computation algorithm (complexity is
currently linear in the number of nodes in the graph).

The critical path is finally computed as a sequence of dependency edges. For
edges describing processor resource interferences, the view also prints a
so-called "interference probability" value (by dividing field
DependencyEdge::Frequency by the total number of iterations).

Examples of critical sequence computations can be found in tests added/modified
by this patch.

On output streams that support colored output, instructions from the critical
sequence are rendered with a different color.

Strictly speaking the analysis conducted by the bottleneck analysis view is not
a critical path analysis. The cost of an edge doesn't only depend on the
dependency latency. More importantly, the cost of a same edge may be computed
differently by different iterations.

The number of dependencies is discovered dynamically based on the events
generated by the simulator. However, their number is not fixed. This is
especially true for edges that model processor resource interferences; an
interference may not occur in every iteration. For that reason, it makes sense
to also print out a "probability of interference".

By construction, the accuracy of this analysis (as always) is strongly dependent
on the simulation (and therefore the quality of the information available in the
scheduling model).

That being said, the critical sequence effectively identifies a performance
criticality. Instructions from that sequence are expected to have a very big
impact on performance. So, users can take advantage of this information to focus
their attention on specific interactions between instructions.
In my experience, it works quite well in practice, and produces useful
output (in a reasonable amount time).

Differential Revision: https://reviews.llvm.org/D63543

llvm-svn: 364045

8 files changed, 321 insertions, 0 deletions

diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-1.s b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-1.s
index 16577cf8b39..4091ad8d715 100644
--- a/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-1.s
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-1.s
@@ -23,6 +23,22 @@ add %edx, %eax
 # CHECK-NEXT:   - Register Dependencies [ 94.04% ]
 # CHECK-NEXT:   - Memory Dependencies   [ 0.00% ]
 
+# CHECK:      Critical sequence based on the simulation:
+
+# CHECK:                    Instruction                                 Dependency Information
+# CHECK-NEXT:  +----< 3.    addl	%edx, %eax
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    addl	%eax, %ebx                        ## REGISTER dependency:  %eax
+# CHECK-NEXT:  +----> 1.    addl	%ebx, %ecx                        ## REGISTER dependency:  %ebx
+# CHECK-NEXT:  +----> 2.    addl	%ecx, %edx                        ## REGISTER dependency:  %ecx
+# CHECK-NEXT:  +----> 3.    addl	%edx, %eax                        ## REGISTER dependency:  %edx
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    addl	%eax, %ebx                        ## REGISTER dependency:  %eax
+
 # CHECK:      Instruction Info:
 # CHECK-NEXT: [1]: #uOps
 # CHECK-NEXT: [2]: Latency
diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-2.s b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-2.s
index 83444d422ad..4ff19360c92 100644
--- a/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-2.s
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-2.s
@@ -22,6 +22,19 @@ vhaddps %xmm0, %xmm0, %xmm1
 # CHECK-NEXT:   - Register Dependencies [ 0.00% ]
 # CHECK-NEXT:   - Memory Dependencies   [ 0.00% ]
 
+# CHECK:      Critical sequence based on the simulation:
+
+# CHECK:                    Instruction                                 Dependency Information
+# CHECK-NEXT:  +----< 0.    vhaddps	%xmm0, %xmm0, %xmm1
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    vhaddps	%xmm0, %xmm0, %xmm1               ## RESOURCE interference:  JFPA [ probability: 99% ]
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    vhaddps	%xmm0, %xmm0, %xmm1               ## RESOURCE interference:  JFPA [ probability: 99% ]
+
 # CHECK:      Instruction Info:
 # CHECK-NEXT: [1]: #uOps
 # CHECK-NEXT: [2]: Latency
diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-3.s b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-3.s
index bedfef1d95f..3b0639a0c5a 100644
--- a/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-3.s
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-3.s
@@ -27,6 +27,26 @@ vmovaps %xmm0, 48(%rdi)
 # CHECK-NEXT:   - Register Dependencies [ 83.24% ]
 # CHECK-NEXT:   - Memory Dependencies   [ 99.89% ]
 
+# CHECK:      Critical sequence based on the simulation:
+
+# CHECK:                    Instruction                                 Dependency Information
+# CHECK-NEXT:  +----< 7.    vmovaps	%xmm0, 48(%rdi)
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    vmovaps	(%rsi), %xmm0                     ## MEMORY dependency.
+# CHECK-NEXT:  +----> 1.    vmovaps	%xmm0, (%rdi)                     ## REGISTER dependency:  %xmm0
+# CHECK-NEXT:  +----> 2.    vmovaps	16(%rsi), %xmm0                   ## MEMORY dependency.
+# CHECK-NEXT:  +----> 3.    vmovaps	%xmm0, 16(%rdi)                   ## REGISTER dependency:  %xmm0
+# CHECK-NEXT:  +----> 4.    vmovaps	32(%rsi), %xmm0                   ## MEMORY dependency.
+# CHECK-NEXT:  +----> 5.    vmovaps	%xmm0, 32(%rdi)                   ## REGISTER dependency:  %xmm0
+# CHECK-NEXT:  +----> 6.    vmovaps	48(%rsi), %xmm0                   ## MEMORY dependency.
+# CHECK-NEXT:  +----> 7.    vmovaps	%xmm0, 48(%rdi)                   ## REGISTER dependency:  %xmm0
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    vmovaps	(%rsi), %xmm0                     ## MEMORY dependency.
+
 # CHECK:      Instruction Info:
 # CHECK-NEXT: [1]: #uOps
 # CHECK-NEXT: [2]: Latency
diff --git a/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-4.s b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-4.s
new file mode 100644
index 00000000000..45f01aaef2c
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/BtVer2/bottleneck-hints-4.s
@@ -0,0 +1,79 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -bottleneck-analysis < %s | FileCheck %s
+
+vmulps   %xmm0, %xmm1, %xmm2
+vhaddps  %xmm2, %xmm2, %xmm3
+vhaddps  %xmm3, %xmm3, %xmm4
+
+# CHECK:      Iterations:        100
+# CHECK-NEXT: Instructions:      300
+# CHECK-NEXT: Total Cycles:      211
+# CHECK-NEXT: Total uOps:        300
+
+# CHECK:      Dispatch Width:    2
+# CHECK-NEXT: uOps Per Cycle:    1.42
+# CHECK-NEXT: IPC:               1.42
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK:      Cycles with backend pressure increase [ 40.76% ]
+# CHECK-NEXT: Throughput Bottlenecks:
+# CHECK-NEXT:   Resource Pressure       [ 39.34% ]
+# CHECK-NEXT:   - JFPA  [ 39.34% ]
+# CHECK-NEXT:   - JFPU0  [ 39.34% ]
+# CHECK-NEXT:   Data Dependencies:      [ 1.42% ]
+# CHECK-NEXT:   - Register Dependencies [ 1.42% ]
+# CHECK-NEXT:   - Memory Dependencies   [ 0.00% ]
+
+# CHECK:      Critical sequence based on the simulation:
+
+# CHECK:                    Instruction                                 Dependency Information
+# CHECK-NEXT:  +----< 2.    vhaddps	%xmm3, %xmm3, %xmm4
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |      0.    vmulps	%xmm0, %xmm1, %xmm2
+# CHECK-NEXT:  +----> 1.    vhaddps	%xmm2, %xmm2, %xmm3               ## RESOURCE interference:  JFPA [ probability: 73% ]
+# CHECK-NEXT:  +----> 2.    vhaddps	%xmm3, %xmm3, %xmm4               ## REGISTER dependency:  %xmm3
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 1.    vhaddps	%xmm2, %xmm2, %xmm3               ## RESOURCE interference:  JFPA [ probability: 73% ]
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      2     1.00                        vmulps	%xmm0, %xmm1, %xmm2
+# CHECK-NEXT:  1      4     1.00                        vhaddps	%xmm2, %xmm2, %xmm3
+# CHECK-NEXT:  1      4     1.00                        vhaddps	%xmm3, %xmm3, %xmm4
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - JALU0
+# CHECK-NEXT: [1]   - JALU1
+# CHECK-NEXT: [2]   - JDiv
+# CHECK-NEXT: [3]   - JFPA
+# CHECK-NEXT: [4]   - JFPM
+# CHECK-NEXT: [5]   - JFPU0
+# CHECK-NEXT: [6]   - JFPU1
+# CHECK-NEXT: [7]   - JLAGU
+# CHECK-NEXT: [8]   - JMul
+# CHECK-NEXT: [9]   - JSAGU
+# CHECK-NEXT: [10]  - JSTC
+# CHECK-NEXT: [11]  - JVALU0
+# CHECK-NEXT: [12]  - JVALU1
+# CHECK-NEXT: [13]  - JVIMUL
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# CHECK-NEXT:  -      -      -     2.00   1.00   2.00   1.00    -      -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# CHECK-NEXT:  -      -      -      -     1.00    -     1.00    -      -      -      -      -      -      -     vmulps	%xmm0, %xmm1, %xmm2
+# CHECK-NEXT:  -      -      -     1.00    -     1.00    -      -      -      -      -      -      -      -     vhaddps	%xmm2, %xmm2, %xmm3
+# CHECK-NEXT:  -      -      -     1.00    -     1.00    -      -      -      -      -      -      -      -     vhaddps	%xmm3, %xmm3, %xmm4
diff --git a/llvm/test/tools/llvm-mca/X86/SkylakeClient/bottleneck-analysis.s b/llvm/test/tools/llvm-mca/X86/SkylakeClient/bottleneck-analysis.s
new file mode 100644
index 00000000000..6c144005c20
--- /dev/null
+++ b/llvm/test/tools/llvm-mca/X86/SkylakeClient/bottleneck-analysis.s
@@ -0,0 +1,154 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mcpu=skylake -bottleneck-analysis < %s | FileCheck %s
+
+.LBB0_4:
+  vmovups	(%rsi,%rax,2), %xmm0
+  vpermilps	$255, %xmm0, %xmm7
+  vmulps	-24(%rsp), %xmm7, %xmm8
+  vpermilps	$170, %xmm0, %xmm6
+  vpermilps	$85, %xmm0, %xmm5
+  vbroadcastss	%xmm0, %xmm0
+  vfmadd231ps	%xmm9, %xmm6, %xmm8
+  vfmadd213ps	%xmm8, %xmm10, %xmm5
+  vfmadd213ps	%xmm5, %xmm11, %xmm0
+  vfmadd213ps	%xmm0, %xmm12, %xmm4
+  vfmadd213ps	%xmm4, %xmm13, %xmm1
+  vmovaps	%xmm7, %xmm4
+  vfmadd213ps	%xmm1, %xmm14, %xmm2
+  vmovaps	%xmm6, %xmm1
+  vfmadd213ps	%xmm2, %xmm15, %xmm3
+  vpermilps	$170, %xmm3, %xmm0
+  vmovups	%xmm3, (%rdx,%rax)
+  vpermilps	$255, %xmm3, %xmm2
+  addq	$16, %rax
+  decl	%ecx
+  vmovaps	%xmm0, %xmm3
+  jne	.LBB0_4
+
+# CHECK:      Iterations:        100
+# CHECK-NEXT: Instructions:      2200
+# CHECK-NEXT: Total Cycles:      1039
+# CHECK-NEXT: Total uOps:        2400
+
+# CHECK:      Dispatch Width:    6
+# CHECK-NEXT: uOps Per Cycle:    2.31
+# CHECK-NEXT: IPC:               2.12
+# CHECK-NEXT: Block RThroughput: 6.0
+
+# CHECK:      Cycles with backend pressure increase [ 92.69% ]
+# CHECK-NEXT: Throughput Bottlenecks:
+# CHECK-NEXT:   Resource Pressure       [ 46.78% ]
+# CHECK-NEXT:   - SKLPort0  [ 14.24% ]
+# CHECK-NEXT:   - SKLPort1  [ 14.24% ]
+# CHECK-NEXT:   - SKLPort5  [ 46.49% ]
+# CHECK-NEXT:   - SKLPort6  [ 8.66% ]
+# CHECK-NEXT:   Data Dependencies:      [ 64.97% ]
+# CHECK-NEXT:   - Register Dependencies [ 64.97% ]
+# CHECK-NEXT:   - Memory Dependencies   [ 0.00% ]
+
+# CHECK:      Critical sequence based on the simulation:
+
+# CHECK:                    Instruction                                 Dependency Information
+# CHECK-NEXT:  +----< 18.   addq	$16, %rax
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    vmovups	(%rsi,%rax,2), %xmm0              ## REGISTER dependency:  %rax
+# CHECK-NEXT:  |      1.    vpermilps	$255, %xmm0, %xmm7
+# CHECK-NEXT:  |      2.    vmulps	-24(%rsp), %xmm7, %xmm8
+# CHECK-NEXT:  +----> 3.    vpermilps	$170, %xmm0, %xmm6                ## REGISTER dependency:  %xmm0
+# CHECK-NEXT:  |      4.    vpermilps	$85, %xmm0, %xmm5
+# CHECK-NEXT:  |      5.    vbroadcastss	%xmm0, %xmm0
+# CHECK-NEXT:  +----> 6.    vfmadd231ps	%xmm9, %xmm6, %xmm8       ## REGISTER dependency:  %xmm6
+# CHECK-NEXT:  +----> 7.    vfmadd213ps	%xmm8, %xmm10, %xmm5      ## REGISTER dependency:  %xmm8
+# CHECK-NEXT:  +----> 8.    vfmadd213ps	%xmm5, %xmm11, %xmm0      ## REGISTER dependency:  %xmm5
+# CHECK-NEXT:  +----> 9.    vfmadd213ps	%xmm0, %xmm12, %xmm4      ## REGISTER dependency:  %xmm0
+# CHECK-NEXT:  +----> 10.   vfmadd213ps	%xmm4, %xmm13, %xmm1      ## REGISTER dependency:  %xmm4
+# CHECK-NEXT:  |      11.   vmovaps	%xmm7, %xmm4
+# CHECK-NEXT:  +----> 12.   vfmadd213ps	%xmm1, %xmm14, %xmm2      ## REGISTER dependency:  %xmm1
+# CHECK-NEXT:  |      13.   vmovaps	%xmm6, %xmm1
+# CHECK-NEXT:  |      14.   vfmadd213ps	%xmm2, %xmm15, %xmm3
+# CHECK-NEXT:  |      15.   vpermilps	$170, %xmm3, %xmm0
+# CHECK-NEXT:  |      16.   vmovups	%xmm3, (%rdx,%rax)
+# CHECK-NEXT:  |      17.   vpermilps	$255, %xmm3, %xmm2
+# CHECK-NEXT:  |      18.   addq	$16, %rax
+# CHECK-NEXT:  |      19.   decl	%ecx
+# CHECK-NEXT:  |      20.   vmovaps	%xmm0, %xmm3
+# CHECK-NEXT:  |      21.   jne	.LBB0_4
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 2.    vmulps	-24(%rsp), %xmm7, %xmm8           ## RESOURCE interference:  SKLPort1 [ probability: 45% ]
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      6     0.50    *                   vmovups	(%rsi,%rax,2), %xmm0
+# CHECK-NEXT:  1      1     1.00                        vpermilps	$255, %xmm0, %xmm7
+# CHECK-NEXT:  2      10    0.50    *                   vmulps	-24(%rsp), %xmm7, %xmm8
+# CHECK-NEXT:  1      1     1.00                        vpermilps	$170, %xmm0, %xmm6
+# CHECK-NEXT:  1      1     1.00                        vpermilps	$85, %xmm0, %xmm5
+# CHECK-NEXT:  1      1     1.00                        vbroadcastss	%xmm0, %xmm0
+# CHECK-NEXT:  1      4     0.50                        vfmadd231ps	%xmm9, %xmm6, %xmm8
+# CHECK-NEXT:  1      4     0.50                        vfmadd213ps	%xmm8, %xmm10, %xmm5
+# CHECK-NEXT:  1      4     0.50                        vfmadd213ps	%xmm5, %xmm11, %xmm0
+# CHECK-NEXT:  1      4     0.50                        vfmadd213ps	%xmm0, %xmm12, %xmm4
+# CHECK-NEXT:  1      4     0.50                        vfmadd213ps	%xmm4, %xmm13, %xmm1
+# CHECK-NEXT:  1      1     0.33                        vmovaps	%xmm7, %xmm4
+# CHECK-NEXT:  1      4     0.50                        vfmadd213ps	%xmm1, %xmm14, %xmm2
+# CHECK-NEXT:  1      1     0.33                        vmovaps	%xmm6, %xmm1
+# CHECK-NEXT:  1      4     0.50                        vfmadd213ps	%xmm2, %xmm15, %xmm3
+# CHECK-NEXT:  1      1     1.00                        vpermilps	$170, %xmm3, %xmm0
+# CHECK-NEXT:  2      1     1.00           *            vmovups	%xmm3, (%rdx,%rax)
+# CHECK-NEXT:  1      1     1.00                        vpermilps	$255, %xmm3, %xmm2
+# CHECK-NEXT:  1      1     0.25                        addq	$16, %rax
+# CHECK-NEXT:  1      1     0.25                        decl	%ecx
+# CHECK-NEXT:  1      1     0.33                        vmovaps	%xmm0, %xmm3
+# CHECK-NEXT:  1      1     0.50                        jne	.LBB0_4
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - SKLDivider
+# CHECK-NEXT: [1]   - SKLFPDivider
+# CHECK-NEXT: [2]   - SKLPort0
+# CHECK-NEXT: [3]   - SKLPort1
+# CHECK-NEXT: [4]   - SKLPort2
+# CHECK-NEXT: [5]   - SKLPort3
+# CHECK-NEXT: [6]   - SKLPort4
+# CHECK-NEXT: [7]   - SKLPort5
+# CHECK-NEXT: [8]   - SKLPort6
+# CHECK-NEXT: [9]   - SKLPort7
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]
+# CHECK-NEXT:  -      -     5.52   5.53   1.01   1.03   1.00   6.02   2.93   0.96
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    Instructions:
+# CHECK-NEXT:  -      -      -      -     0.04   0.96    -      -      -      -     vmovups	(%rsi,%rax,2), %xmm0
+# CHECK-NEXT:  -      -      -      -      -      -      -     1.00    -      -     vpermilps	$255, %xmm0, %xmm7
+# CHECK-NEXT:  -      -     0.03   0.97   0.96   0.04    -      -      -      -     vmulps	-24(%rsp), %xmm7, %xmm8
+# CHECK-NEXT:  -      -      -      -      -      -      -     1.00    -      -     vpermilps	$170, %xmm0, %xmm6
+# CHECK-NEXT:  -      -      -      -      -      -      -     1.00    -      -     vpermilps	$85, %xmm0, %xmm5
+# CHECK-NEXT:  -      -      -      -      -      -      -     1.00    -      -     vbroadcastss	%xmm0, %xmm0
+# CHECK-NEXT:  -      -     0.95   0.05    -      -      -      -      -      -     vfmadd231ps	%xmm9, %xmm6, %xmm8
+# CHECK-NEXT:  -      -     0.50   0.50    -      -      -      -      -      -     vfmadd213ps	%xmm8, %xmm10, %xmm5
+# CHECK-NEXT:  -      -     0.92   0.08    -      -      -      -      -      -     vfmadd213ps	%xmm5, %xmm11, %xmm0
+# CHECK-NEXT:  -      -     0.95   0.05    -      -      -      -      -      -     vfmadd213ps	%xmm0, %xmm12, %xmm4
+# CHECK-NEXT:  -      -     0.51   0.49    -      -      -      -      -      -     vfmadd213ps	%xmm4, %xmm13, %xmm1
+# CHECK-NEXT:  -      -     0.52   0.48    -      -      -      -      -      -     vmovaps	%xmm7, %xmm4
+# CHECK-NEXT:  -      -     0.49   0.51    -      -      -      -      -      -     vfmadd213ps	%xmm1, %xmm14, %xmm2
+# CHECK-NEXT:  -      -     0.04   0.95    -      -      -     0.01    -      -     vmovaps	%xmm6, %xmm1
+# CHECK-NEXT:  -      -     0.51   0.49    -      -      -      -      -      -     vfmadd213ps	%xmm2, %xmm15, %xmm3
+# CHECK-NEXT:  -      -      -      -      -      -      -     1.00    -      -     vpermilps	$170, %xmm3, %xmm0
+# CHECK-NEXT:  -      -      -      -     0.01   0.03   1.00    -      -     0.96   vmovups	%xmm3, (%rdx,%rax)
+# CHECK-NEXT:  -      -      -      -      -      -      -     1.00    -      -     vpermilps	$255, %xmm3, %xmm2
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     1.00    -     addq	$16, %rax
+# CHECK-NEXT:  -      -     0.04   0.01    -      -      -     0.01   0.94    -     decl	%ecx
+# CHECK-NEXT:  -      -     0.05   0.95    -      -      -      -      -      -     vmovaps	%xmm0, %xmm3
+# CHECK-NEXT:  -      -     0.01    -      -      -      -      -     0.99    -     jne	.LBB0_4
diff --git a/llvm/test/tools/llvm-mca/X86/option-all-views-1.s b/llvm/test/tools/llvm-mca/X86/option-all-views-1.s
index ed097e70734..27e3a67374c 100644
--- a/llvm/test/tools/llvm-mca/X86/option-all-views-1.s
+++ b/llvm/test/tools/llvm-mca/X86/option-all-views-1.s
@@ -25,6 +25,19 @@ add %eax, %eax
 # FULLREPORT-NEXT:      - Register Dependencies [ 76.70% ]
 # FULLREPORT-NEXT:      - Memory Dependencies   [ 0.00% ]
 
+# FULLREPORT:         Critical sequence based on the simulation:
+
+# FULLREPORT:                       Instruction                                 Dependency Information
+# FULLREPORT-NEXT:     +----< 0.    addl	%eax, %eax
+# FULLREPORT-NEXT:     |
+# FULLREPORT-NEXT:     |    < loop carried >
+# FULLREPORT-NEXT:     |
+# FULLREPORT-NEXT:     +----> 0.    addl	%eax, %eax                        ## REGISTER dependency:  %eax
+# FULLREPORT-NEXT:     |
+# FULLREPORT-NEXT:     |    < loop carried >
+# FULLREPORT-NEXT:     |
+# FULLREPORT-NEXT:     +----> 0.    addl	%eax, %eax                        ## REGISTER dependency:  %eax
+
 # DEFAULTREPORT:      Instruction Info:
 # DEFAULTREPORT-NEXT: [1]: #uOps
 # DEFAULTREPORT-NEXT: [2]: Latency
diff --git a/llvm/test/tools/llvm-mca/X86/option-all-views-2.s b/llvm/test/tools/llvm-mca/X86/option-all-views-2.s
index efa66be1fb0..a19da0addba 100644
--- a/llvm/test/tools/llvm-mca/X86/option-all-views-2.s
+++ b/llvm/test/tools/llvm-mca/X86/option-all-views-2.s
@@ -24,6 +24,19 @@ add %eax, %eax
 # ALL-NEXT:          - Register Dependencies [ 76.70% ]
 # ALL-NEXT:          - Memory Dependencies   [ 0.00% ]
 
+# ALL:             Critical sequence based on the simulation:
+
+# ALL:                           Instruction                                 Dependency Information
+# ALL-NEXT:         +----< 0.    addl	%eax, %eax
+# ALL-NEXT:         |
+# ALL-NEXT:         |    < loop carried >
+# ALL-NEXT:         |
+# ALL-NEXT:         +----> 0.    addl	%eax, %eax                        ## REGISTER dependency:  %eax
+# ALL-NEXT:         |
+# ALL-NEXT:         |    < loop carried >
+# ALL-NEXT:         |
+# ALL-NEXT:         +----> 0.    addl	%eax, %eax                        ## REGISTER dependency:  %eax
+
 # ALL:             Instruction Info:
 # ALL-NEXT:        [1]: #uOps
 # ALL-NEXT:        [2]: Latency
diff --git a/llvm/test/tools/llvm-mca/X86/option-no-stats-1.s b/llvm/test/tools/llvm-mca/X86/option-no-stats-1.s
index dc843bb2761..d505dd9bc3e 100644
--- a/llvm/test/tools/llvm-mca/X86/option-no-stats-1.s
+++ b/llvm/test/tools/llvm-mca/X86/option-no-stats-1.s
@@ -22,6 +22,19 @@ add %edi, %eax
 # CHECK-NEXT:   - Register Dependencies [ 76.70% ]
 # CHECK-NEXT:   - Memory Dependencies   [ 0.00% ]
 
+# CHECK:      Critical sequence based on the simulation:
+
+# CHECK:                    Instruction                                 Dependency Information
+# CHECK-NEXT:  +----< 0.    addl	%edi, %eax
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    addl	%edi, %eax                        ## REGISTER dependency:  %eax
+# CHECK-NEXT:  |
+# CHECK-NEXT:  |    < loop carried >
+# CHECK-NEXT:  |
+# CHECK-NEXT:  +----> 0.    addl	%edi, %eax                        ## REGISTER dependency:  %eax
+
 # CHECK:      Instruction Info:
 # CHECK-NEXT: [1]: #uOps
 # CHECK-NEXT: [2]: Latency