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| author | David Majnemer <david.majnemer@gmail.com> | 2013-08-27 21:56:17 +0000 |
|---|---|---|
| committer | David Majnemer <david.majnemer@gmail.com> | 2013-08-27 21:56:17 +0000 |
| commit | aa34d79ab51fe18e30a238a227f4fe96b4fb2f7e (patch) | |
| tree | 9ea04465507120c52be612c76f39288fb0f9a187 /llvm/test | |
| parent | 5ae3a670c3d80a774a5f6d440747910cd2a2dbb6 (diff) | |
| download | bcm5719-llvm-aa34d79ab51fe18e30a238a227f4fe96b4fb2f7e.tar.gz bcm5719-llvm-aa34d79ab51fe18e30a238a227f4fe96b4fb2f7e.zip | |
[ms-inline asm] Support offsets after segment registers
Summary: MASM let's you do stuff like 'MOV FS:20, EAX' and 'MOV EAX, FS:20'
Reviewers: craig.topper, rnk
Reviewed By: rnk
CC: llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1470
llvm-svn: 189407
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/X86/intel-syntax.s | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/test/MC/X86/intel-syntax.s b/llvm/test/MC/X86/intel-syntax.s index ff86e8dc4e5..f63513919ad 100644 --- a/llvm/test/MC/X86/intel-syntax.s +++ b/llvm/test/MC/X86/intel-syntax.s @@ -63,6 +63,12 @@ _main: mov ECX, DWORD PTR [4*ECX + _fnan] // CHECK: movq %fs:320, %rax mov RAX, QWORD PTR FS:[320] +// CHECK: movq %fs:320, %rax + mov RAX, QWORD PTR FS:320 +// CHECK: movq %rax, %fs:320 + mov QWORD PTR FS:320, RAX +// CHECK: movq %rax, %fs:20(%rbx) + mov QWORD PTR FS:20[rbx], RAX // CHECK: vpgatherdd %xmm8, (%r15,%xmm9,2), %xmm1 vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8 // CHECK: movsd -8, %xmm5 |
