[AMDGPU][MC][GFX9] Added buffer_*_format_d16_hi_x

See bug 36835: https://bugs.llvm.org/show_bug.cgi?id=36835

Differential Revision: https://reviews.llvm.org/D44825

Reviewers: artem.tamazov, arsenm, timcorringham
llvm-svn: 328707

2 files changed, 70 insertions, 0 deletions

diff --git a/llvm/test/MC/AMDGPU/mubuf-gfx9.s b/llvm/test/MC/AMDGPU/mubuf-gfx9.s
index 390aeab350a..d9c3fc39cfd 100644
--- a/llvm/test/MC/AMDGPU/mubuf-gfx9.s
+++ b/llvm/test/MC/AMDGPU/mubuf-gfx9.s
@@ -32,3 +32,51 @@ buffer_store_byte_d16_hi v1, off, s[4:7], s1
 buffer_store_short_d16_hi v1, off, s[4:7], s1
 // GFX9: buffer_store_short_d16_hi v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x6c,0xe0,0x00,0x01,0x01,0x01]
 // VI-ERR: error: instruction not supported on this GPU
+
+buffer_load_format_d16_hi_x v5, off, s[8:11], s3
+// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 ; encoding: [0x00,0x00,0x98,0xe0,0x00,0x05,0x02,0x03]
+// VI-ERR: error: instruction not supported on this GPU
+
+buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095
+// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 ; encoding: [0xff,0x0f,0x98,0xe0,0x00,0x05,0x02,0x03]
+// VI-ERR: error
+
+buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095
+// GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095 ; encoding: [0xff,0x2f,0x98,0xe0,0x00,0x05,0x02,0x03]
+// VI-ERR: error
+
+buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095
+// GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095 ; encoding: [0xff,0x1f,0x98,0xe0,0x00,0x05,0x02,0x03]
+// VI-ERR: error
+
+buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc
+// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc ; encoding: [0xff,0x4f,0x98,0xe0,0x00,0x05,0x02,0x03]
+// VI-ERR: error
+
+buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 slc
+// GFX9: buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 slc ; encoding: [0xff,0x0f,0x9a,0xe0,0x00,0x05,0x02,0x03]
+// VI-ERR: error
+
+buffer_store_format_d16_hi_x v255, off, s[12:15], s4
+// GFX9: buffer_store_format_d16_hi_x v255, off, s[12:15], s4 ; encoding: [0x00,0x00,0x9c,0xe0,0x00,0xff,0x03,0x04]
+// VI-ERR: error: instruction not supported on this GPU
+
+buffer_store_format_d16_hi_x v255, off, s[12:15], s4 offset:4095
+// GFX9: buffer_store_format_d16_hi_x v255, off, s[12:15], s4 offset:4095 ; encoding: [0xff,0x0f,0x9c,0xe0,0x00,0xff,0x03,0x04]
+// VI-ERR: error
+
+buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 idxen offset:4095
+// GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 idxen offset:4095 ; encoding: [0xff,0x2f,0x9c,0xe0,0x00,0x01,0x03,0x04]
+// VI-ERR: error
+
+buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 offen offset:4095
+// GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 offen offset:4095 ; encoding: [0xff,0x1f,0x9c,0xe0,0x00,0x01,0x03,0x04]
+// VI-ERR: error
+
+buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 glc
+// GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 glc ; encoding: [0xff,0x4f,0x9c,0xe0,0x00,0x01,0x03,0x04]
+// VI-ERR: error
+
+buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 slc
+// GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 slc ; encoding: [0xff,0x0f,0x9e,0xe0,0x00,0x01,0x03,0x04]
+// VI-ERR: error
diff --git a/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx9.txt b/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx9.txt
new file mode 100644
index 00000000000..436c69459f5
--- /dev/null
+++ b/llvm/test/MC/Disassembler/AMDGPU/mubuf_gfx9.txt
@@ -0,0 +1,22 @@
+# RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9
+
+# GFX9:  buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:4095 glc slc ; encoding: [0xff,0x4f,0x9a,0xe0,0x00,0x05,0x02,0x03]
+0xff,0x4f,0x9a,0xe0,0x00,0x05,0x02,0x03
+
+# GFX9:  buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 idxen offset:4095 ; encoding: [0xff,0x2f,0x98,0xe0,0x00,0x05,0x02,0x03]
+0xff,0x2f,0x98,0xe0,0x00,0x05,0x02,0x03
+
+# GFX9: buffer_load_format_d16_hi_x v5, v0, s[8:11], s3 offen offset:4095 ; encoding: [0xff,0x1f,0x98,0xe0,0x00,0x05,0x02,0x03]
+0xff,0x1f,0x98,0xe0,0x00,0x05,0x02,0x03
+
+# GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 idxen offset:4095 ; encoding: [0xff,0x2f,0x9c,0xe0,0x00,0x01,0x03,0x04]
+0xff,0x2f,0x9c,0xe0,0x00,0x01,0x03,0x04
+
+# GFX9: buffer_store_format_d16_hi_x v1, v0, s[12:15], s4 offen offset:4095 ; encoding: [0xff,0x1f,0x9c,0xe0,0x00,0x01,0x03,0x04]
+0xff,0x1f,0x9c,0xe0,0x00,0x01,0x03,0x04
+
+# GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 glc ; encoding: [0xff,0x4f,0x9c,0xe0,0x00,0x01,0x03,0x04]
+0xff,0x4f,0x9c,0xe0,0x00,0x01,0x03,0x04
+
+# GFX9: buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:4095 slc ; encoding: [0xff,0x0f,0x9e,0xe0,0x00,0x01,0x03,0x04]
+0xff,0x0f,0x9e,0xe0,0x00,0x01,0x03,0x04