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author | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2017-06-24 16:00:26 +0000 |
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committer | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2017-06-24 16:00:26 +0000 |
commit | a85d24b73d57ebfb657c4e1971e32b8afc44ea54 (patch) | |
tree | 4354603c7c74d9c2598ef2fe8b95b5ae378b79e3 /llvm/test | |
parent | b300824ee72224ad0887225b99b7e56997cdc3d3 (diff) | |
download | bcm5719-llvm-a85d24b73d57ebfb657c4e1971e32b8afc44ea54.tar.gz bcm5719-llvm-a85d24b73d57ebfb657c4e1971e32b8afc44ea54.zip |
fix trivial typos in comment, NFC
llvm-svn: 306211
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/CodeGen/AArch64/arm64-shrink-v1i64.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-shrink-v1i64.ll b/llvm/test/CodeGen/AArch64/arm64-shrink-v1i64.ll index 3e926d42740..57cc8120b91 100644 --- a/llvm/test/CodeGen/AArch64/arm64-shrink-v1i64.ll +++ b/llvm/test/CodeGen/AArch64/arm64-shrink-v1i64.ll @@ -3,7 +3,7 @@ ; The DAGCombiner tries to do following shrink: ; Convert x+y to (VT)((SmallVT)x+(SmallVT)y) ; But currently it can't handle vector type and will trigger an assertion failure -; when it tries to generate an add mixed using vector type and scaler type. +; when it tries to generate an add mixed using vector type and scalar type. ; This test checks that such assertion failur should not happen. define <1 x i64> @dotest(<1 x i64> %in0) { entry: |