GlobalISel: Disallow vectors for G_CONSTANT/G_FCONSTANT

llvm-svn: 351853

3 files changed, 58 insertions, 25 deletions

diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
index 1422ed2a4c9..480309d2741 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
@@ -53,23 +53,23 @@ body: |
 name: test_select_v2s32
 body: |
   bb.0:
-    liveins: $vgpr0
+    liveins: $vgpr0, $vgpr1_vgpr2, $vgpr3_vgpr4
     ; CHECK-LABEL: name: test_select_v2s32
-    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
-    ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
-    ; CHECK: [[C1:%[0-9]+]]:_(<2 x s32>) = G_CONSTANT i32 1
-    ; CHECK: [[C2:%[0-9]+]]:_(<2 x s32>) = G_CONSTANT i32 2
-    ; CHECK: [[SELECT:%[0-9]+]]:_(<2 x s32>) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
+    ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr1_vgpr2
+    ; CHECK: [[COPY2:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr3_vgpr4
+    ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
+    ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY]](s32), [[C]]
+    ; CHECK: [[SELECT:%[0-9]+]]:_(<2 x s32>) = G_SELECT [[ICMP]](s1), [[COPY1]], [[COPY2]]
     ; CHECK: $vgpr0_vgpr1 = COPY [[SELECT]](<2 x s32>)
-    %0:_(s32) = G_CONSTANT i32 0
-    %1:_(s32) = COPY $vgpr0
+    %0:_(s32) = COPY $vgpr0
+    %1:_(<2 x s32>) = COPY $vgpr1_vgpr2
+    %2:_(<2 x s32>) = COPY $vgpr3_vgpr4
+    %4:_(s32) = G_CONSTANT i32 0
 
-    %2:_(s1) = G_ICMP intpred(ne), %0, %1
-    %3:_(<2 x s32>) = G_CONSTANT i32 1
-    %4:_(<2 x s32>) = G_CONSTANT i32 2
-    %5:_(<2 x s32>) = G_SELECT %2, %3, %4
-    $vgpr0_vgpr1 = COPY %5
+    %5:_(s1) = G_ICMP intpred(ne), %0, %4
+    %6:_(<2 x s32>) = G_SELECT %5, %1, %2
+    $vgpr0_vgpr1 = COPY %6
 
 ...
 
@@ -160,22 +160,22 @@ body: |
 name: test_select_v2s16
 body: |
   bb.0:
-    liveins: $vgpr0
+    liveins: $vgpr0, $vgpr1, $vgpr2
     ; CHECK-LABEL: name: test_select_v2s16
+    ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0
+    ; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr1
+    ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
     ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
-    ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[C]](s32), [[COPY]]
-    ; CHECK: [[C1:%[0-9]+]]:_(<2 x s16>) = G_CONSTANT i32 1
-    ; CHECK: [[C2:%[0-9]+]]:_(<2 x s16>) = G_CONSTANT i32 2
-    ; CHECK: [[SELECT:%[0-9]+]]:_(<2 x s16>) = G_SELECT [[ICMP]](s1), [[C1]], [[C2]]
+    ; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY2]](s32), [[C]]
+    ; CHECK: [[SELECT:%[0-9]+]]:_(<2 x s16>) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
     ; CHECK: $vgpr0 = COPY [[SELECT]](<2 x s16>)
-    %0:_(s32) = G_CONSTANT i32 0
-    %1:_(s32) = COPY $vgpr0
+    %0:_(<2 x s16>) = COPY $vgpr0
+    %1:_(<2 x s16>) = COPY $vgpr1
+    %2:_(s32) = COPY $vgpr2
+    %3:_(s32) = G_CONSTANT i32 0
 
-    %2:_(s1) = G_ICMP intpred(ne), %0, %1
-    %3:_(<2 x s16>) = G_CONSTANT i32 1
-    %4:_(<2 x s16>) = G_CONSTANT i32 2
-    %5:_(<2 x s16>) = G_SELECT %2, %3, %4
+    %4:_(s1) = G_ICMP intpred(ne), %2, %3
+    %5:_(<2 x s16>) = G_SELECT %4, %0, %1
     $vgpr0 = COPY %5
 
 ...
diff --git a/llvm/test/Verifier/test_g_constant.mir b/llvm/test/Verifier/test_g_constant.mir
new file mode 100644
index 00000000000..2fa8d03505c
--- /dev/null
+++ b/llvm/test/Verifier/test_g_constant.mir
@@ -0,0 +1,18 @@
+#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: global-isel, aarch64-registered-target
+
+---
+name:            test_constant
+legalized:       true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+    ; CHECK: Bad machine code: Instruction cannot use a vector result type
+    %0:_(<2 x s32>) = G_CONSTANT i32 0
+
+    ; CHECK: Bad machine code: Too few operands
+    %1:_(s32) = G_CONSTANT
+...
diff --git a/llvm/test/Verifier/test_g_fconstant.mir b/llvm/test/Verifier/test_g_fconstant.mir
new file mode 100644
index 00000000000..fecc47de5be
--- /dev/null
+++ b/llvm/test/Verifier/test_g_fconstant.mir
@@ -0,0 +1,15 @@
+#RUN: not llc -o - -global-isel -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+# REQUIRES: global-isel, aarch64-registered-target
+
+---
+name:            test_fconstant_vector
+legalized:       true
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+liveins:
+body:             |
+  bb.0:
+    ; CHECK: Bad machine code: Instruction cannot use a vector result type
+    %0:_(<2 x s32>) = G_FCONSTANT float 0.0
+...