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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-04-11 15:20:40 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2016-04-11 15:20:40 +0000 |
| commit | a45d3e439f60f993ee4fe7995cc197427bc3c4f6 (patch) | |
| tree | 98d8d65cfbe064edaf87a62cf17eb61078c73ce3 /llvm/test | |
| parent | 2d2d67994c429c0bf28296b6ae47dee5d7c0951d (diff) | |
| download | bcm5719-llvm-a45d3e439f60f993ee4fe7995cc197427bc3c4f6.tar.gz bcm5719-llvm-a45d3e439f60f993ee4fe7995cc197427bc3c4f6.zip | |
[mips] Trivial corrections to range checked immediates.
Summary:
SYNC has a 5-bit unsigned immediate.
Move MIPS16-specific pcrel16 operand to Mips16 files.
Reviewers: vkalintiris
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: http://reviews.llvm.org/D18755
llvm-svn: 265947
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/Mips/micromips/invalid.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/micromips32r6/invalid.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips32r2/invalid.s | 2 | ||||
| -rw-r--r-- | llvm/test/MC/Mips/mips32r6/invalid.s | 2 |
4 files changed, 8 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/micromips/invalid.s b/llvm/test/MC/Mips/micromips/invalid.s index d7a1613f545..1141c1886b3 100644 --- a/llvm/test/MC/Mips/micromips/invalid.s +++ b/llvm/test/MC/Mips/micromips/invalid.s @@ -48,5 +48,7 @@ sra $2, $3, 32 # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate srl $2, $3, -1 # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate srl $2, $3, 32 # CHECK: :[[@LINE]]:15: error: expected 5-bit unsigned immediate + sync -1 # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate + sync 32 # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate swe $2, -513($gp) # CHECK: :[[@LINE]]:11: error: expected memory with $gp and 9-bit signed offset swe $2, 512($gp) # CHECK: :[[@LINE]]:11: error: expected memory with $gp and 9-bit signed offset diff --git a/llvm/test/MC/Mips/micromips32r6/invalid.s b/llvm/test/MC/Mips/micromips32r6/invalid.s index bcd1cf5a1f4..bbcff46e14a 100644 --- a/llvm/test/MC/Mips/micromips32r6/invalid.s +++ b/llvm/test/MC/Mips/micromips32r6/invalid.s @@ -99,6 +99,8 @@ sh16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range sh16 $16, 8($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction sh16 $7, 8($9) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + sync -1 # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate + sync 32 # CHECK: :[[@LINE]]:8: error: expected 5-bit unsigned immediate sw16 $9, 4($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction sw16 $4, 64($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range sw16 $16, 4($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction diff --git a/llvm/test/MC/Mips/mips32r2/invalid.s b/llvm/test/MC/Mips/mips32r2/invalid.s index 9413d5c5bf4..888bed8bd17 100644 --- a/llvm/test/MC/Mips/mips32r2/invalid.s +++ b/llvm/test/MC/Mips/mips32r2/invalid.s @@ -36,6 +36,8 @@ srl $2, $3, 32 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate sra $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate sra $2, $3, 32 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate + sync -1 # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate + sync 32 # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate syscall -1 # CHECK: :[[@LINE]]:17: error: expected 20-bit unsigned immediate syscall 1048576 # CHECK: :[[@LINE]]:17: error: expected 20-bit unsigned immediate rotr $2, $3, -1 # CHECK: :[[@LINE]]:22: error: expected 5-bit unsigned immediate diff --git a/llvm/test/MC/Mips/mips32r6/invalid.s b/llvm/test/MC/Mips/mips32r6/invalid.s index c7feed16c10..cfba1c3e7df 100644 --- a/llvm/test/MC/Mips/mips32r6/invalid.s +++ b/llvm/test/MC/Mips/mips32r6/invalid.s @@ -49,3 +49,5 @@ local_label: mfc2 $4, $3, 8 # CHECK: :[[@LINE]]:23: error: expected 3-bit unsigned immediate sdc2 $20, -1025($s2) # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled sdc2 $20, 1024($s2) # CHECK: :[[@LINE]]:9: error: instruction requires a CPU feature not currently enabled + sync -1 # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate + sync 32 # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate |
