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authorEvan Cheng <evan.cheng@apple.com>2010-06-02 01:08:27 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-06-02 01:08:27 +0000
commita2da22734fb4ece66c664df1141eec51981390d0 (patch)
treecf384fbc0acfdaf6fabb3117e9f88359944ed151 /llvm/test
parent469bb2be2cbad03756a7ad8bab16a55a80f9ae55 (diff)
downloadbcm5719-llvm-a2da22734fb4ece66c664df1141eec51981390d0.tar.gz
bcm5719-llvm-a2da22734fb4ece66c664df1141eec51981390d0.zip
Enable machine cse of instructions which define physical registers.
llvm-svn: 105308
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/ARM/machine-cse-cmp.ll18
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/machine-cse-cmp.ll b/llvm/test/CodeGen/ARM/machine-cse-cmp.ll
new file mode 100644
index 00000000000..c77402f3bc1
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/machine-cse-cmp.ll
@@ -0,0 +1,18 @@
+; RUN: llc < %s -march=arm | FileCheck %s
+;rdar://8003725
+
+@G1 = external global i32
+@G2 = external global i32
+
+define i32 @f1(i32 %cond1, i32 %x1, i32 %x2, i32 %x3) {
+entry:
+; CHECK: cmp
+; CHECK: moveq
+; CHECK-NOT: cmp
+; CHECK: moveq
+ %tmp1 = icmp eq i32 %cond1, 0
+ %tmp2 = select i1 %tmp1, i32 %x1, i32 %x2
+ %tmp3 = select i1 %tmp1, i32 %x2, i32 %x3
+ %tmp4 = add i32 %tmp2, %tmp3
+ ret i32 %tmp4
+}
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