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| author | Kit Barton <kbarton@ca.ibm.com> | 2016-03-09 17:48:01 +0000 |
|---|---|---|
| committer | Kit Barton <kbarton@ca.ibm.com> | 2016-03-09 17:48:01 +0000 |
| commit | a1d6a6f1de5b453a5839d204a732fc9eb1b707ab (patch) | |
| tree | 39e41cf1b1e0e1854a62e14026eaa5fd273a11dc /llvm/test | |
| parent | 22b5a4d597f955614dfcc00ead3feb4e690fdb18 (diff) | |
| download | bcm5719-llvm-a1d6a6f1de5b453a5839d204a732fc9eb1b707ab.tar.gz bcm5719-llvm-a1d6a6f1de5b453a5839d204a732fc9eb1b707ab.zip | |
[PPC] backend changes to generate xvabs[s,d]p and xvnabs[s,d]p instructions
This has to be committed before the FE changes
Phabricator: http://reviews.llvm.org/D17837
llvm-svn: 263035
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/vec_abs.ll | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/vec_abs.ll b/llvm/test/CodeGen/PowerPC/vec_abs.ll new file mode 100644 index 00000000000..8fa26a614b9 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/vec_abs.ll @@ -0,0 +1,80 @@ +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64le \ +; RUN: -mattr=+altivec -mattr=+vsx | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -march=ppc64le \ +; RUN: -mattr=+altivec -mattr=-vsx | FileCheck %s \ +; RUN: -check-prefix=CHECK-NOVSX + +define <4 x float> @test_float(<4 x float> %aa) #0 { + +; CHECK-LABEL: test_float +; CHECK-NOVSX-LABEL: test_float +; CHECK-NOVSX-LABEL: test_float + + entry: + %0 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %aa) #2 + ret <4 x float> %0 +} +; Function Attrs: nounwind readnone +declare <4 x float> @llvm.fabs.v4f32(<4 x float>) #1 + +; CHECK: xvabssp +; CHECK: blr +; CHECK-NOVSX: fabs +; CHECK-NOVSX: fabs +; CHECK-NOVSX: fabs +; CHECK-NOVSX: fabs +; CHECK-NOVSX: blr + +define <4 x float> @test2_float(<4 x float> %aa) #0 { + +; CHECK-LABEL: test2_float +; CHECK-NOVSX-LABEL: test2_float + + entry: + %0 = tail call <4 x float> @llvm.fabs.v4f32(<4 x float> %aa) #2 + %sub = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, + float -0.000000e+00, float -0.000000e+00>, %0 + ret <4 x float> %sub +} + +; CHECK: xvnabssp +; CHECK: blr +; CHECK-NOVSX: vspltisb +; CHECK-NOVSX: fabs +; CHECK-NOVSX: fabs +; CHECK-NOVSX: fabs +; CHECK-NOVSX: fabs +; CHECK-NOVSX: vsubfp +; CHECK-NOVSX: blr + +define <2 x double> @test_double(<2 x double> %aa) #0 { + +; CHECK-LABEL: test_double +; CHECK-NOVSX-LABEL: test_double + + entry: + %0 = tail call <2 x double> @llvm.fabs.v2f64(<2 x double> %aa) #2 + ret <2 x double> %0 +} + +; Function Attrs: nounwind readnone +declare <2 x double> @llvm.fabs.v2f64(<2 x double>) #1 + +; CHECK: xvabsdp +; CHECK: blr +; CHECK-NOVSX: fabs +; CHECK-NOVSX: fabs +; CHECK-NOVSX: blr + +define <2 x double> @foo(<2 x double> %aa) #0 { + entry: + %0 = tail call <2 x double> @llvm.fabs.v2f64(<2 x double> %aa) #2 + %sub = fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, %0 + ret <2 x double> %sub +} + +; CHECK: xvnabsdp +; CHECK: blr +; CHECK-NOVSX: fnabs +; CHECK-NOVSX: fnabs +; CHECK-NOVSX: blr |
