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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-11-15 00:03:14 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-11-15 00:03:14 +0000 |
| commit | 9c884e495c83e73c4cc8768adc1572fcf582c08c (patch) | |
| tree | b06efbd22911ec0d3129d67defd56d849a561184 /llvm/test | |
| parent | 3ee54a693394c3e00cd0357650665fed4cf94695 (diff) | |
| download | bcm5719-llvm-9c884e495c83e73c4cc8768adc1572fcf582c08c.tar.gz bcm5719-llvm-9c884e495c83e73c4cc8768adc1572fcf582c08c.zip | |
MIRParser: Add support for parsing vreg reg alloc hints
Reviewers: qcolombet, MatzeB
Subscribers: wdng, llvm-commits
Differential Revision: https://reviews.llvm.org/D26573
llvm-svn: 286911
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir index bba7b1a6e4a..5e7dde26769 100644 --- a/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir +++ b/llvm/test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir @@ -1,4 +1,4 @@ -# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s +# RUN: llc -march=x86-64 -run-pass none -o - %s 2>&1 | FileCheck %s --- | @@ -14,7 +14,8 @@ name: test tracksRegLiveness: true registers: - { id: 0, class: gr32 } - # CHECK: [[@LINE+1]]:48: expected a named register + # CHECK: - { id: 1, class: gr32, preferred-register: '%0' } + # CHECK: - { id: 2, class: gr32, preferred-register: '%edi' } - { id: 1, class: gr32, preferred-register: '%0' } - { id: 2, class: gr32, preferred-register: '%edi' } body: | |
