[mips] Use ptr_rc to simplify definitions of base+index load/store instructions.

Also, fix predicates.

llvm-svn: 189432

8 files changed, 90 insertions, 2 deletions

diff --git a/llvm/test/MC/Disassembler/Mips/mips-dsp.txt b/llvm/test/MC/Disassembler/Mips/mips-dsp.txt
index d10e62cd23c..3f60ae1f8e6 100644
--- a/llvm/test/MC/Disassembler/Mips/mips-dsp.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips-dsp.txt
@@ -11,3 +11,12 @@
 
 # CHECK: mtlo $21, $ac3
 0x13 0x18 0xa0 0x02
+
+# CHECK: lbux $10, $20($26)
+0x8a 0x51 0x54 0x7f
+
+# CHECK: lhx  $11, $21($27)
+0x0a 0x59 0x75 0x7f
+
+# CHECK: lwx  $12, $22($gp)
+0x0a 0x60 0x96 0x7f
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2.txt b/llvm/test/MC/Disassembler/Mips/mips32r2.txt
index 48b6ad42e63..11d9058221c 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2.txt
@@ -242,6 +242,9 @@
 # CHECK: lui  $6, 17767
 0x3c 0x06 0x45 0x67
 
+# CHECK: luxc1 $f0, $6($5)
+0x4c 0xa6 0x00 0x05
+
 # CHECK: lw  $4, 24($5)
 0x8c 0xa4 0x00 0x18
 
@@ -254,6 +257,9 @@
 # CHECK: lwr   $3, 16($5)
 0x98 0xa3 0x00 0x10
 
+# CHECK: lwxc1 $f20, $12($14)
+0x4d 0xcc 0x05 0x00
+
 # CHECK: madd   $6,  $7
 0x70 0xc7 0x00 0x00
 
@@ -404,6 +410,9 @@
 # CHECK: subu  $4, $3, $5
 0x00 0x65 0x20 0x23
 
+# CHECK: suxc1 $f4, $24($5)
+0x4c 0xb8 0x20 0x0d
+
 # CHECK: sw  $4, 24($5)
 0xac 0xa4 0x00 0x18
 
@@ -416,6 +425,9 @@
 # CHECK: swr $6, 16($7)
 0xb8 0xe6 0x00 0x10
 
+# CHECK: swxc1 $f26, $18($22)
+0x4e 0xd2 0xd0 0x08
+
 # CHECK: sync  7
 0x00 0x00 0x01 0xcf
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt b/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
index c62c69543c5..adafcf1258c 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2_le.txt
@@ -242,6 +242,9 @@
 # CHECK: lui  $6, 17767
 0x67 0x45 0x06 0x3c
 
+# CHECK: luxc1 $f0, $6($5)
+0x05 0x00 0xa6 0x4c
+
 # CHECK: lw  $4, 24($5)
 0x18 0x00 0xa4 0x8c
 
@@ -254,6 +257,9 @@
 # CHECK: lwr   $3, 16($5)
 0x10 0x00 0xa3 0x98
 
+# CHECK: lwxc1 $f20, $12($14)
+0x00 0x05 0xcc 0x4d
+
 # CHECK: madd   $6,  $7
 0x00 0x00 0xc7 0x70
 
@@ -404,6 +410,9 @@
 # CHECK: subu  $4, $3, $5
 0x23 0x20 0x65 0x00
 
+# CHECK: suxc1 $f4, $24($5)
+0x0d 0x20 0xb8 0x4c
+
 # CHECK: sw  $4, 24($5)
 0x18 0x00 0xa4 0xac
 
@@ -416,6 +425,9 @@
 # CHECK: swr $6, 16($7)
 0x10 0x00 0xe6 0xb8
 
+# CHECK: swxc1 $f26, $18($22)
+0x08 0xd0 0xd2 0x4e
+
 # CHECK: sync  7
 0xcf 0x01 0x00 0x00
 
diff --git a/llvm/test/MC/Disassembler/Mips/mips64.txt b/llvm/test/MC/Disassembler/Mips/mips64.txt
index b88747370b6..2ccef834e87 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64.txt
@@ -64,3 +64,21 @@
 
 # CHECK: sd $6, 17767($zero)
 0xfc 0x06 0x45 0x67
+
+# CHECK: luxc1 $f0, $6($5)
+0x4c 0xa6 0x00 0x05
+
+# CHECK: lwxc1 $f20, $12($14)
+0x4d 0xcc 0x05 0x00
+
+# CHECK: suxc1 $f4, $24($5)
+0x4c 0xb8 0x20 0x0d
+
+# CHECK: swxc1 $f26, $18($22)
+0x4e 0xd2 0xd0 0x08
+
+# CHECK: ldxc1 $f2, $2($10)
+0x4d 0x42 0x00 0x81
+
+# CHECK: sdxc1 $f8, $4($25)
+0x4f 0x24 0x40 0x09
diff --git a/llvm/test/MC/Disassembler/Mips/mips64_le.txt b/llvm/test/MC/Disassembler/Mips/mips64_le.txt
index ddc3c2b60be..0d3d2faf131 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64_le.txt
@@ -64,3 +64,21 @@
 
 # CHECK: sd $6, 17767($zero)
 0x67 0x45 0x06 0xfc
+
+# CHECK: luxc1 $f0, $6($5)
+0x05 0x00 0xa6 0x4c
+
+# CHECK: lwxc1 $f20, $12($14)
+0x00 0x05 0xcc 0x4d
+
+# CHECK: suxc1 $f4, $24($5)
+0x0d 0x20 0xb8 0x4c
+
+# CHECK: swxc1 $f26, $18($22)
+0x08 0xd0 0xd2 0x4e
+
+# CHECK: ldxc1 $f2, $2($10)
+0x81 0x00 0x42 0x4d
+
+# CHECK: sdxc1 $f8, $4($25)
+0x09 0x40 0x24 0x4f
diff --git a/llvm/test/MC/Mips/mips-dsp-instructions.s b/llvm/test/MC/Mips/mips-dsp-instructions.s
index 50762bcdafa..83e03733437 100644
--- a/llvm/test/MC/Mips/mips-dsp-instructions.s
+++ b/llvm/test/MC/Mips/mips-dsp-instructions.s
@@ -22,6 +22,10 @@
 # CHECK:   precr_sra_r.ph.w  $25, $26, 0     # encoding: [0x7f,0x59,0x07,0xd1]
 # CHECK:   precr_sra_r.ph.w  $25, $26, 31    # encoding: [0x7f,0x59,0xff,0xd1]
 
+# CHECK:   lbux $10, $20($26)                # encoding: [0x7f,0x54,0x51,0x8a]
+# CHECK:   lhx  $11, $21($27)                # encoding: [0x7f,0x75,0x59,0x0a]
+# CHECK:   lwx  $12, $22($gp)                # encoding: [0x7f,0x96,0x60,0x0a]
+
 # CHECK:    mult $ac3, $2, $3               # encoding: [0x00,0x43,0x18,0x18]
 # CHECK:    multu $ac2, $4, $5              # encoding: [0x00,0x85,0x10,0x19]
 # CHECK:    madd $ac1, $6, $7               # encoding: [0x70,0xc7,0x08,0x00]
@@ -50,6 +54,10 @@
   precr_sra_r.ph.w  $25,$26,0
   precr_sra_r.ph.w  $25,$26,31
 
+  lbux $10, $s4($26)
+  lhx  $11, $s5($27)
+  lwx  $12, $s6($28)
+
   mult $ac3, $2, $3
   multu $ac2, $4, $5
   madd $ac1, $6, $7
diff --git a/llvm/test/MC/Mips/mips-fpu-instructions.s b/llvm/test/MC/Mips/mips-fpu-instructions.s
index 0a240d224af..db3c5261a8e 100644
--- a/llvm/test/MC/Mips/mips-fpu-instructions.s
+++ b/llvm/test/MC/Mips/mips-fpu-instructions.s
@@ -165,6 +165,8 @@
 # CHECK:  movf.s  $f4, $f6, $fcc5         # encoding: [0x11,0x31,0x14,0x46]
 # CHECK:  luxc1   $f0, $6($5)             # encoding: [0x05,0x00,0xa6,0x4c]
 # CHECK:  suxc1   $f4, $24($5)            # encoding: [0x0d,0x20,0xb8,0x4c]
+# CHECK:  lwxc1   $f20, $12($14)          # encoding: [0x00,0x05,0xcc,0x4d]
+# CHECK:  swxc1   $f26, $18($22)          # encoding: [0x08,0xd0,0xd2,0x4e]
 
    cfc1    $a2,$0
    ctc1    $10,$31
@@ -190,5 +192,7 @@
    movt    $4, $5, $fcc4
    movf.d  $f4, $f6, $fcc2
    movf.s  $f4, $f6, $fcc5
-   luxc1 $f0, $a2($a1)
-   suxc1 $f4, $t8($a1)
\ No newline at end of file
+   luxc1   $f0, $a2($a1)
+   suxc1   $f4, $t8($a1)
+   lwxc1   $f20, $12($14)
+   swxc1   $f26, $s2($s6)
diff --git a/llvm/test/MC/Mips/mips64-instructions.s b/llvm/test/MC/Mips/mips64-instructions.s
new file mode 100644
index 00000000000..74e9d13197e
--- /dev/null
+++ b/llvm/test/MC/Mips/mips64-instructions.s
@@ -0,0 +1,7 @@
+# RUN: llvm-mc  %s -triple=mips64el-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s
+
+# CHECK: ldxc1 $f2, $2($10)           # encoding: [0x81,0x00,0x42,0x4d]
+# CHECK: sdxc1 $f8, $4($25)           # encoding: [0x09,0x40,0x24,0x4f]
+
+  ldxc1 $f2, $2($10)
+  sdxc1 $f8, $a0($t9)