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authorBill Schmidt <wschmidt@linux.vnet.ibm.com>2013-01-07 19:29:18 +0000
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>2013-01-07 19:29:18 +0000
commit9b1e3e25dc7265b4c399176e08c05c303761af4c (patch)
treeb8a9b5f33e94079630253d47cef83d6206423a0c /llvm/test
parentc41cf0598f076f8f6cd2223c739592a91fe78717 (diff)
downloadbcm5719-llvm-9b1e3e25dc7265b4c399176e08c05c303761af4c.tar.gz
bcm5719-llvm-9b1e3e25dc7265b4c399176e08c05c303761af4c.zip
This patch addresses bug 14678 by fixing two problems in medium code model
code generation. Variables addressed through a GlobalAlias were not being handled, and variables with available_externally linkage were treated incorrectly. The patch contains two new tests to verify the correct code generation for these cases. llvm-svn: 171778
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/PowerPC/mcm-8.ll24
-rw-r--r--llvm/test/CodeGen/PowerPC/mcm-9.ll27
2 files changed, 51 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/mcm-8.ll b/llvm/test/CodeGen/PowerPC/mcm-8.ll
new file mode 100644
index 00000000000..9381a976a42
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/mcm-8.ll
@@ -0,0 +1,24 @@
+; RUN: llc -mcpu=pwr7 -O0 -code-model=medium < %s | FileCheck %s
+
+; Test correct code generation for medium code model (32-bit TOC offsets)
+; for loading a variable with available-externally linkage.
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+@x = available_externally constant [13 x i8] c"St9bad_alloc\00"
+
+define signext i8 @test_avext() nounwind {
+entry:
+ %0 = getelementptr inbounds [13 x i8]* @x, i32 0, i32 0
+ %1 = load i8* %0, align 1
+ ret i8 %1
+}
+
+; CHECK: test_avext:
+; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
+; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
+; CHECK: lbz {{[0-9]+}}, 0([[REG2]])
+; CHECK: .section .toc
+; CHECK: .LC[[TOCNUM]]:
+; CHECK: .tc {{[a-z0-9A-Z_.]+}}[TC],{{[a-z0-9A-Z_.]+}}
diff --git a/llvm/test/CodeGen/PowerPC/mcm-9.ll b/llvm/test/CodeGen/PowerPC/mcm-9.ll
new file mode 100644
index 00000000000..422607c5bcb
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/mcm-9.ll
@@ -0,0 +1,27 @@
+; RUN: llc -mcpu=pwr7 -O0 -code-model=medium <%s | FileCheck %s
+
+; Test correct code generation for medium code model (32-bit TOC offsets)
+; for loading and storing an aliased external variable.
+
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+@ei = external global i32
+@a = alias i32* @ei
+
+define signext i32 @test_external() nounwind {
+entry:
+ %0 = load i32* @a, align 4
+ %inc = add nsw i32 %0, 1
+ store i32 %inc, i32* @a, align 4
+ ret i32 %0
+}
+
+; CHECK: test_external:
+; CHECK: addis [[REG1:[0-9]+]], 2, .LC[[TOCNUM:[0-9]+]]@toc@ha
+; CHECK: ld [[REG2:[0-9]+]], .LC[[TOCNUM]]@toc@l([[REG1]])
+; CHECK: lwz {{[0-9]+}}, 0([[REG2]])
+; CHECK: stw {{[0-9]+}}, 0([[REG2]])
+; CHECK: .section .toc
+; CHECK: .LC[[TOCNUM]]:
+; CHECK: .tc {{[a-z0-9A-Z_.]+}}[TC],{{[a-z0-9A-Z_.]+}}
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