Change the informal convention of DBG_VALUE so that we can express a

register-indirect address with an offset of 0.
It used to be that a DBG_VALUE is a register-indirect value if the offset
(operand 1) is nonzero. The new convention is that a DBG_VALUE is
register-indirect if the first operand is a register and the second
operand is an immediate. For plain registers use the combination reg, reg.

rdar://problem/13658587

llvm-svn: 180816

6 files changed, 119 insertions, 9 deletions

diff --git a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
index 38945ac2ea7..364519fb19b 100644
--- a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
+++ b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll
@@ -5,8 +5,8 @@ target triple = "thumbv7-apple-macosx10.6.7"
 ;CHECK: 	vadd.f32	q4, q8, q8
 ;CHECK-NEXT: LBB0_1
 
-;CHECK:@DEBUG_VALUE: x <- Q4+0
-;CHECK-NEXT:@DEBUG_VALUE: y <- Q4+0
+;CHECK:@DEBUG_VALUE: x <- Q4
+;CHECK-NEXT:@DEBUG_VALUE: y <- Q4
 
 
 @.str = external constant [13 x i8]
diff --git a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
index b764b0b3459..b07a1929f85 100644
--- a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
+++ b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
@@ -8,7 +8,7 @@ target triple = "x86_64-apple-darwin10.2"
 @llvm.used = appending global [1 x i8*] [i8* bitcast (i32 (%struct.foo*, i32)* @_ZN3foo3bazEi to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
 
 define i32 @_ZN3foo3bazEi(%struct.foo* nocapture %this, i32 %x) nounwind readnone optsize noinline ssp align 2 {
-;CHECK: DEBUG_VALUE: baz:this <- RDI+0
+;CHECK: DEBUG_VALUE: baz:this <- RDI
 entry:
   tail call void @llvm.dbg.value(metadata !{%struct.foo* %this}, i64 0, metadata !15)
   tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !16)
diff --git a/llvm/test/CodeGen/X86/dbg-value-dag-combine.ll b/llvm/test/CodeGen/X86/dbg-value-dag-combine.ll
index c63235e7ad6..36c6fac7e6a 100644
--- a/llvm/test/CodeGen/X86/dbg-value-dag-combine.ll
+++ b/llvm/test/CodeGen/X86/dbg-value-dag-combine.ll
@@ -16,7 +16,7 @@ entry:
   call void @llvm.dbg.value(metadata !12, i64 0, metadata !13), !dbg !14
   %tmp2 = load i32 addrspace(1)* %ip, align 4, !dbg !15
   %tmp3 = add i32 0, %tmp2, !dbg !15
-; CHECK:  ##DEBUG_VALUE: idx <- EAX+0
+; CHECK:  ##DEBUG_VALUE: idx <- EAX
   call void @llvm.dbg.value(metadata !{i32 %tmp3}, i64 0, metadata !13), !dbg
 !15
   %arrayidx = getelementptr i32 addrspace(1)* %ip, i32 %1, !dbg !16
diff --git a/llvm/test/CodeGen/X86/dbg-value-range.ll b/llvm/test/CodeGen/X86/dbg-value-range.ll
index b068bbbe784..83aa34e8a4b 100644
--- a/llvm/test/CodeGen/X86/dbg-value-range.ll
+++ b/llvm/test/CodeGen/X86/dbg-value-range.ll
@@ -40,7 +40,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
 !21 = metadata !{metadata !6, metadata !11}
 !22 = metadata !{metadata !"bar.c", metadata !"/private/tmp"}
 
-; Check that variable bar:b value range is appropriately trucated in debug info.
+; Check that variable bar:b value range is appropriately truncated in debug info.
 ; The variable is in %rdi which is clobbered by 'movl %ebx, %edi'
 ; Here Ltmp7 is the end of the location range.
 
@@ -54,7 +54,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
 ;CHECK-NEXT: Lset{{.*}} = Ltmp{{.*}}-Ltmp{{.*}}
 ;CHECK-NEXT:    .short  Lset
 ;CHECK-NEXT: Ltmp
-;CHECK-NEXT:	.byte	85
+;CHECK-NEXT:	.byte	85 ## DW_OP_reg
 ;CHECK-NEXT: Ltmp
 ;CHECK-NEXT:	.quad	0
 ;CHECK-NEXT:	.quad	0
diff --git a/llvm/test/DebugInfo/X86/op_deref.ll b/llvm/test/DebugInfo/X86/op_deref.ll
index c3580a790c1..31fd57bcb26 100644
--- a/llvm/test/DebugInfo/X86/op_deref.ll
+++ b/llvm/test/DebugInfo/X86/op_deref.ll
@@ -1,10 +1,16 @@
 ; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o %t -filetype=obj
-; RUN: llvm-dwarfdump -debug-dump=info %t | FileCheck %s
+; RUN: llvm-dwarfdump -debug-dump=info %t | FileCheck %s -check-prefix=DW-CHECK
 
-; CHECK: DW_AT_name [DW_FORM_strp]  ( .debug_str[0x00000067] = "vla")
+; DW-CHECK: DW_AT_name [DW_FORM_strp]  ( .debug_str[0x00000067] = "vla")
 ; FIXME: The location here needs to be fixed, but llvm-dwarfdump doesn't handle
 ; DW_AT_location lists yet.
-; CHECK: DW_AT_location [DW_FORM_data4]                      (0x00000000)
+; DW-CHECK: DW_AT_location [DW_FORM_data4]                      (0x00000000)
+
+; Unfortunately llvm-dwarfdump can't unparse a list of DW_AT_locations
+; right now, so we check the asm output:
+; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - -filetype=asm | FileCheck %s -check-prefix=ASM-CHECK
+; vla should have a register-indirect address at one point.
+; ASM-CHECK: DEBUG_VALUE: vla <- RCX+0
 
 define void @testVLAwithSize(i32 %s) nounwind uwtable ssp {
 entry:
diff --git a/llvm/test/DebugInfo/X86/vla.ll b/llvm/test/DebugInfo/X86/vla.ll
new file mode 100644
index 00000000000..783c50f0c24
--- /dev/null
+++ b/llvm/test/DebugInfo/X86/vla.ll
@@ -0,0 +1,104 @@
+; RUN: llc -O0 -mtriple=x86_64-apple-darwin -filetype=asm %s -o - | FileCheck %s
+; Ensure that we generate a breg+0 location for the variable length array a.
+; CHECK: ##DEBUG_VALUE: vla:a <- RDX+0
+; rdar://problem/13658587
+;
+; generated from:
+;
+; int vla(int n) {
+;   int a[n];
+;   a[0] = 42;
+;   return a[n-1];
+; }
+;
+; int main(int argc, char** argv) {
+;    return vla(argc);
+; }
+
+; ModuleID = 'vla.c'
+target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
+target triple = "x86_64-apple-macosx10.8.0"
+
+; Function Attrs: nounwind ssp uwtable
+define i32 @vla(i32 %n) nounwind ssp uwtable {
+entry:
+  %n.addr = alloca i32, align 4
+  %saved_stack = alloca i8*
+  %cleanup.dest.slot = alloca i32
+  store i32 %n, i32* %n.addr, align 4
+  call void @llvm.dbg.declare(metadata !{i32* %n.addr}, metadata !15), !dbg !16
+  %0 = load i32* %n.addr, align 4, !dbg !17
+  %1 = zext i32 %0 to i64, !dbg !17
+  %2 = call i8* @llvm.stacksave(), !dbg !17
+  store i8* %2, i8** %saved_stack, !dbg !17
+  %vla = alloca i32, i64 %1, align 16, !dbg !17
+  call void @llvm.dbg.declare(metadata !{i32* %vla}, metadata !18), !dbg !17
+  %arrayidx = getelementptr inbounds i32* %vla, i64 0, !dbg !22
+  store i32 42, i32* %arrayidx, align 4, !dbg !22
+  %3 = load i32* %n.addr, align 4, !dbg !23
+  %sub = sub nsw i32 %3, 1, !dbg !23
+  %idxprom = sext i32 %sub to i64, !dbg !23
+  %arrayidx1 = getelementptr inbounds i32* %vla, i64 %idxprom, !dbg !23
+  %4 = load i32* %arrayidx1, align 4, !dbg !23
+  store i32 1, i32* %cleanup.dest.slot
+  %5 = load i8** %saved_stack, !dbg !24
+  call void @llvm.stackrestore(i8* %5), !dbg !24
+  ret i32 %4, !dbg !23
+}
+
+; Function Attrs: nounwind readnone
+declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
+
+; Function Attrs: nounwind
+declare i8* @llvm.stacksave() nounwind
+
+; Function Attrs: nounwind
+declare void @llvm.stackrestore(i8*) nounwind
+
+; Function Attrs: nounwind ssp uwtable
+define i32 @main(i32 %argc, i8** %argv) nounwind ssp uwtable {
+entry:
+  %retval = alloca i32, align 4
+  %argc.addr = alloca i32, align 4
+  %argv.addr = alloca i8**, align 8
+  store i32 0, i32* %retval
+  store i32 %argc, i32* %argc.addr, align 4
+  call void @llvm.dbg.declare(metadata !{i32* %argc.addr}, metadata !25), !dbg !26
+  store i8** %argv, i8*** %argv.addr, align 8
+  call void @llvm.dbg.declare(metadata !{i8*** %argv.addr}, metadata !27), !dbg !26
+  %0 = load i32* %argc.addr, align 4, !dbg !28
+  %call = call i32 @vla(i32 %0), !dbg !28
+  ret i32 %call, !dbg !28
+}
+
+!llvm.dbg.cu = !{!0}
+
+!0 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [/vla.c] [DW_LANG_C99]
+!1 = metadata !{metadata !"vla.c", metadata !""}
+!2 = metadata !{i32 0}
+!3 = metadata !{metadata !4, metadata !9}
+!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"vla", metadata !"vla", metadata !"", i32 1, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @vla, null, null, metadata !2, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [vla]
+!5 = metadata !{i32 786473, metadata !1}          ; [ DW_TAG_file_type ] [/vla.c]
+!6 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
+!7 = metadata !{metadata !8, metadata !8}
+!8 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
+!9 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"main", metadata !"main", metadata !"", i32 7, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32, i8**)* @main, null, null, metadata !2, i32 7} ; [ DW_TAG_subprogram ] [line 7] [def] [main]
+!10 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
+!11 = metadata !{metadata !8, metadata !8, metadata !12}
+!12 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !13} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ]
+!13 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from char]
+!14 = metadata !{i32 786468, null, null, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char]
+!15 = metadata !{i32 786689, metadata !4, metadata !"n", metadata !5, i32 16777217, metadata !8, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [n] [line 1]
+!16 = metadata !{i32 1, i32 0, metadata !4, null}
+!17 = metadata !{i32 2, i32 0, metadata !4, null}
+!18 = metadata !{i32 786688, metadata !4, metadata !"a", metadata !5, i32 2, metadata !19, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [a] [line 2]
+!19 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !8, metadata !20, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int]
+!20 = metadata !{metadata !21}
+!21 = metadata !{i32 786465, i64 0, i64 -1}       ; [ DW_TAG_subrange_type ] [unbounded]
+!22 = metadata !{i32 3, i32 0, metadata !4, null}
+!23 = metadata !{i32 4, i32 0, metadata !4, null}
+!24 = metadata !{i32 5, i32 0, metadata !4, null}
+!25 = metadata !{i32 786689, metadata !9, metadata !"argc", metadata !5, i32 16777223, metadata !8, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [argc] [line 7]
+!26 = metadata !{i32 7, i32 0, metadata !9, null}
+!27 = metadata !{i32 786689, metadata !9, metadata !"argv", metadata !5, i32 33554439, metadata !12, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [argv] [line 7]
+!28 = metadata !{i32 8, i32 0, metadata !9, null}