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| author | Coby Tayree <coby.tayree@intel.com> | 2016-11-20 17:09:56 +0000 |
|---|---|---|
| committer | Coby Tayree <coby.tayree@intel.com> | 2016-11-20 17:09:56 +0000 |
| commit | 97e9cf62f40dc2cc7c83920142f23a40c667f7d5 (patch) | |
| tree | d7fa2e166d83d413d0ed5da0c9b840c4a96e70d1 /llvm/test | |
| parent | 5fadce4a3f9c2a3c944a9f181676496539093559 (diff) | |
| download | bcm5719-llvm-97e9cf62f40dc2cc7c83920142f23a40c667f7d5.tar.gz bcm5719-llvm-97e9cf62f40dc2cc7c83920142f23a40c667f7d5.zip | |
Some instructions were missing, other implemented falsely. this patch aims at amending those issues. full list:
vcvtps2pd
vcvtudq2pd
vcvtps2qq
vcvttps2qq
vcvtps2uqq
vcvttps2uqq
variants are:
[Dst]XMM(zero-masked/merge-masked/unmasked)
[Src]Mem64
Differential Revision: https://reviews.llvm.org/D26799
llvm-svn: 287500
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/MC/X86/intel-syntax-x86-64-avx512f_vl.s | 29 | ||||
| -rw-r--r-- | llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s | 98 |
2 files changed, 127 insertions, 0 deletions
diff --git a/llvm/test/MC/X86/intel-syntax-x86-64-avx512f_vl.s b/llvm/test/MC/X86/intel-syntax-x86-64-avx512f_vl.s index 4f4c6d15df6..0e812ddaa78 100644 --- a/llvm/test/MC/X86/intel-syntax-x86-64-avx512f_vl.s +++ b/llvm/test/MC/X86/intel-syntax-x86-64-avx512f_vl.s @@ -1343,3 +1343,32 @@ // CHECK: vcvtuqq2ps xmm16, ymmword ptr [rax] // CHECK: encoding: [0x62,0xe1,0xff,0x28,0x7a,0x00] vcvtuqq2psy xmm16, ymmword ptr [rax] + +// CHECK: vcvtps2pd xmm1 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7c,0x8a,0x5a,0x49,0x10] + vcvtps2pd xmm1 {k2} {z}, qword ptr [rcx+0x80] + +// CHECK: vcvtps2pd xmm1 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7c,0x0a,0x5a,0x49,0x10] + vcvtps2pd xmm1 {k2}, qword ptr [rcx+0x80] + +// CHECK: vcvtudq2pd xmm2 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7e,0x8a,0x7a,0x51,0x10] + vcvtudq2pd xmm2 {k2} {z}, qword ptr [rcx+0x80] + +// CHECK: vcvtudq2pd xmm2 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7e,0x0a,0x7a,0x51,0x10] + vcvtudq2pd xmm2 {k2}, qword ptr [rcx+0x80] + +// CHECK: vcvtudq2pd xmm2, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7e,0x08,0x7a,0x51,0x10] + vcvtudq2pd xmm2, qword ptr [rcx+0x80] + +// CHECK: vcvtdq2pd xmm2 {k1}, qword ptr [rcx] +// CHECK: encoding: [0x62,0xf1,0x7e,0x09,0xe6,0x11] + vcvtdq2pd xmm2 {k1}, qword ptr [rcx] + +// CHECK: vcvtdq2pd xmm2 {k1} {z}, qword ptr [rcx] +// CHECK: encoding: [0x62,0xf1,0x7e,0x89,0xe6,0x11] + vcvtdq2pd xmm2 {k1} {z}, qword ptr [rcx] + diff --git a/llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s b/llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s new file mode 100644 index 00000000000..9fa08380a4b --- /dev/null +++ b/llvm/test/MC/X86/intel-syntax-x86-avx512dq_vl.s @@ -0,0 +1,98 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512vl -mattr=+avx512dq -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s + +// CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10] + vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 0x80] + +// CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10] + vcvtps2qq xmm2 {k2}, qword ptr [rcx + 0x80] + +// CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10] + vcvtps2qq xmm2, qword ptr [rcx + 0x80] + +// CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10] + vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 0x80] + +// CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10] + vcvttps2qq xmm1 {k2}, qword ptr [rcx + 0x80] + +// CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10] + vcvttps2qq xmm1, qword ptr [rcx + 0x80] + +// CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10] + vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] + +// CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10] + vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128] + +// CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10] + vcvtps2uqq xmm1, qword ptr [rcx + 128] + +// CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10] + vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] + +// CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10] + vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128] + +// CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10] + vcvttps2uqq xmm1, qword ptr [rcx + 128] +// RUN: llvm-mc -triple x86_64-unknown-unknown -mcpu=knl -mattr=+avx512vl -mattr=+avx512dq -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s + +// CHECK: vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7b,0x51,0x10] + vcvtps2qq xmm2 {k2} {z}, qword ptr [rcx + 0x80] + +// CHECK: vcvtps2qq xmm2 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7b,0x51,0x10] + vcvtps2qq xmm2 {k2}, qword ptr [rcx + 0x80] + +// CHECK: vcvtps2qq xmm2, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7b,0x51,0x10] + vcvtps2qq xmm2, qword ptr [rcx + 0x80] + +// CHECK: vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x7a,0x49,0x10] + vcvttps2qq xmm1 {k2} {z}, qword ptr [rcx + 0x80] + +// CHECK: vcvttps2qq xmm1 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x7a,0x49,0x10] + vcvttps2qq xmm1 {k2}, qword ptr [rcx + 0x80] + +// CHECK: vcvttps2qq xmm1, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x7a,0x49,0x10] + vcvttps2qq xmm1, qword ptr [rcx + 0x80] + +// CHECK: vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x79,0x49,0x10] + vcvtps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] + +// CHECK: vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x79,0x49,0x10] + vcvtps2uqq xmm1 {k2}, qword ptr [rcx + 128] + +// CHECK: vcvtps2uqq xmm1, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x79,0x49,0x10] + vcvtps2uqq xmm1, qword ptr [rcx + 128] + +// CHECK: vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x8a,0x78,0x49,0x10] + vcvttps2uqq xmm1 {k2} {z}, qword ptr [rcx + 128] + +// CHECK: vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x0a,0x78,0x49,0x10] + vcvttps2uqq xmm1 {k2}, qword ptr [rcx + 128] + +// CHECK: vcvttps2uqq xmm1, qword ptr [rcx + 128] +// CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x78,0x49,0x10] + vcvttps2uqq xmm1, qword ptr [rcx + 128] |

