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| author | Craig Topper <craig.topper@intel.com> | 2017-07-03 05:54:12 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-07-03 05:54:12 +0000 |
| commit | 960ce1ee204ab999e7e1018e6db76f21132837a0 (patch) | |
| tree | c946fd117aef3a32d096b53e8b6b435b7612b51b /llvm/test | |
| parent | c6948c25cc21658e5601c66a82990cd0006b8f62 (diff) | |
| download | bcm5719-llvm-960ce1ee204ab999e7e1018e6db76f21132837a0.tar.gz bcm5719-llvm-960ce1ee204ab999e7e1018e6db76f21132837a0.zip | |
[InstCombine] Add test cases showing missed opportunity to fold BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) for vectors. NFC
llvm-svn: 306998
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/Transforms/InstCombine/bswap-fold.ll | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/bswap-fold.ll b/llvm/test/Transforms/InstCombine/bswap-fold.ll index 1e80c9be66f..cc947bad233 100644 --- a/llvm/test/Transforms/InstCombine/bswap-fold.ll +++ b/llvm/test/Transforms/InstCombine/bswap-fold.ll @@ -211,6 +211,46 @@ define i64 @bs_xor64(i64 %a, i64 %b) #0 { ret i64 %tmp3 } +define <2 x i32> @bs_and32vec(<2 x i32> %a, <2 x i32> %b) #0 { +; CHECK-LABEL: @bs_and32vec( +; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[A:%.*]]) +; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[B:%.*]]) +; CHECK-NEXT: [[TMP3:%.*]] = and <2 x i32> [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; + %tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a) + %tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b) + %tmp3 = and <2 x i32> %tmp1, %tmp2 + ret <2 x i32> %tmp3 +} + +define <2 x i32> @bs_or32vec(<2 x i32> %a, <2 x i32> %b) #0 { +; CHECK-LABEL: @bs_or32vec( +; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[A:%.*]]) +; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[B:%.*]]) +; CHECK-NEXT: [[TMP3:%.*]] = or <2 x i32> [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; + %tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a) + %tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b) + %tmp3 = or <2 x i32> %tmp1, %tmp2 + ret <2 x i32> %tmp3 +} + +define <2 x i32> @bs_xor32vec(<2 x i32> %a, <2 x i32> %b) #0 { +; CHECK-LABEL: @bs_xor32vec( +; CHECK-NEXT: [[TMP1:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[A:%.*]]) +; CHECK-NEXT: [[TMP2:%.*]] = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> [[B:%.*]]) +; CHECK-NEXT: [[TMP3:%.*]] = xor <2 x i32> [[TMP1]], [[TMP2]] +; CHECK-NEXT: ret <2 x i32> [[TMP3]] +; + %tmp1 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %a) + %tmp2 = tail call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %b) + %tmp3 = xor <2 x i32> %tmp1, %tmp2 + ret <2 x i32> %tmp3 +} + declare i16 @llvm.bswap.i16(i16) declare i32 @llvm.bswap.i32(i32) declare i64 @llvm.bswap.i64(i64) +declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) |
