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| author | Renato Golin <renato.golin@linaro.org> | 2016-03-02 19:35:45 +0000 |
|---|---|---|
| committer | Renato Golin <renato.golin@linaro.org> | 2016-03-02 19:35:45 +0000 |
| commit | 93e42d99347ac36a19ba3e08108ccd1d9c8f1ff4 (patch) | |
| tree | 95e9ace782deee66655274aff5dd61373db49deb /llvm/test | |
| parent | cbbaeb13074400ead830be88143c31e7aac3c01c (diff) | |
| download | bcm5719-llvm-93e42d99347ac36a19ba3e08108ccd1d9c8f1ff4.tar.gz bcm5719-llvm-93e42d99347ac36a19ba3e08108ccd1d9c8f1ff4.zip | |
[ARM] Merging 64-bit divmod lib calls into one
When div+rem calls on the same arguments are found, the ARM back-end merges the
two calls into one __aeabi_divmod call for up to 32-bits values. However,
for 64-bit values, which also have a lib call (__aeabi_ldivmod), it wasn't
merging the calls, and thus calling ldivmod twice and spilling the temporary
results, which generated pretty bad code.
This patch legalises 64-bit lib calls for divmod, so that now all the spilling
and the second call are gone. It also relaxes the DivRem combiner a bit on the
legal type check, since it was already checking for isLegalOrCustom on every
value, so the extra check for isTypeLegal was redundant.
This patch fixes PR17193 (and a long time FIXME in the tests).
llvm-svn: 262507
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/ARM/divmod-eabi.ll | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/ARM/divmod-eabi.ll b/llvm/test/CodeGen/ARM/divmod-eabi.ll index 35f2014317b..29c7fe0ff86 100644 --- a/llvm/test/CodeGen/ARM/divmod-eabi.ll +++ b/llvm/test/CodeGen/ARM/divmod-eabi.ll @@ -79,7 +79,6 @@ entry: ret i32 %add2 } -; FIXME: AEABI is not lowering long u/srem into u/ldivmod define i64 @longf(i64 %a, i64 %b) { ; EABI-LABEL: longf: ; DARWIN-LABEL: longf: @@ -87,6 +86,9 @@ entry: %div = sdiv i64 %a, %b %rem = srem i64 %a, %b ; EABI: __aeabi_ldivmod +; EABI-NEXT: adds r0 +; EABI-NEXT: adc r1 +; EABI-NOT: __aeabi_ldivmod ; DARWIN: ___divdi3 ; DARWIN: mov [[div1:r[0-9]+]], r0 ; DARWIN: mov [[div2:r[0-9]+]], r1 |
